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Hi @Commanderfranz, How to solve this error: [DRC BIVC-1] Bank IO standard Vcc: Conflicting Vcc voltages in bank 35. For example, the following two ports in this bank have conflicting VCCOs: ddr3_sdram_0_ck_p (DIFF_SSTL135, requiring VCCO=1.350) and sys_clock (LVCMOS33, requiring VCCO=3.300) Any comments I will appreciate it. thanks
I followed the tutorial on Youtube shown below to 9:33 but my Bitstream generation is unsuccessful. I get the following rule violation: [DRC 23-20] Rule violation (BIVC-1) Bank IO standard Vcc - Conflicting Vcc voltages in bank 14. For example, the following two ports in this bank have conflicting VCCOs: btnD (LVCMOS18, requiring VCCO=1.800) and led (LVCMOS33, requiring VCCO=3.300) Does anybody what I can do to fix it? Thank you very much! Tony