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Found 24 results

  1. Zybo DMA Audio Demo - Documentation

    I am doing a project with some audio DSP. For this I am using the audio codec on the Zybo. The first thing I want to do, is to be able to record and playback audio with a little delay between input and output. In order to speed up the development process, I decided to use the DMA Audio demo. But I'm lacking some information or rather some documentation. So is there any of your guys who knows which registers is references to here (Audio controller registers) in the code below. Since I2S is an hardware interface standard, so there should not be any registers. So I think it has something to do with DMA. But I can't find any documentation, which fits. Do anybody know which documentation would give a insight to the registers? #define AUDIO_CTL_ADDR XPAR_D_AXI_I2S_AUDIO_0_AXI_L_BASEADDR //Audio controller registers enum i2sRegisters { I2S_RESET_REG = AUDIO_CTL_ADDR, I2S_TRANSFER_CONTROL_REG = AUDIO_CTL_ADDR + 0x04, I2S_FIFO_CONTROL_REG = AUDIO_CTL_ADDR + 0x08, I2S_DATA_IN_REG = AUDIO_CTL_ADDR + 0x0c, I2S_DATA_OUT_REG = AUDIO_CTL_ADDR + 0x10, I2S_STATUS_REG = AUDIO_CTL_ADDR + 0x14, I2S_CLOCK_CONTROL_REG = AUDIO_CTL_ADDR + 0x18, I2S_PERIOD_COUNT_REG = AUDIO_CTL_ADDR + 0x1C, I2S_STREAM_CONTROL_REG = AUDIO_CTL_ADDR + 0x20 };
  2. Audio processing on Zybo with DMA Audio Demo

    Hi, I recently purchased a Zybo board and used the DMA Audio Demo ( to acquire audio input and output. The Audio codec records 5 seconds of audio and then passes it to the Zynq PL via I²S protocol, that is it transmits the bit clock BCLK, the word select RECLRC and the data recorded RECDAT. My goal is to take this data and apply a filter on it, before the stream is mapped into memory with a DMA and then sent back to the audio codec and played in earphones. But I don't really understand how the data is received by the PL and where to find it (in some buffer I guess) in order to take it, process it, and then put it back in a different buffer where the DMA could access it and do his thing. Does anyone have experience with this demo that could help me figure this out ? Thanks, Lucile
  3. SGTL5000 + PMOD CMOD-A7

    Hi! I've hooked up a CMOD-A7 to an audio codec board designed for the Raspberry Pi, getting ready to play with some audio. You can find the VHDL source at It is still rough and ready, but it works
  4. Hi Guys, im realatively new to electronics and even newer to measurements! I've just got my discovery 2 and was hoping someone might be able to guide me with some general question and tips. Sorry if my questions sound stupid in advance very new!!! Firstly, measuring balanced connections? I know what's required to measure single ended audio connections but trying to work out how best to measure seeing have inverting and non inverting connections plus gnd? Can anyone provide some guidance on how to go about this? Assume I know nothing when it comes to oscilloscope and waveforms!! secondly, measuring THD of an audio circuit has anyone got any tips of how best to measure, configure and calculate, using waveform? i assume it's something around using spectrum analyzer with test tone and looking at the harmonic against the fundamental, but some guidance on how to configure, measure and calculate would be awesome! lastly, what should be the expected noisefloor of the discovery be inheritly? -80ish db?? any guidance would be appreciated thanks guys hype
  5. I am trying to determine if and how a Vivado IP Core can be used to create and audible tone. I have been reviewing the DSS Compiler 6.0 product guide and simulation tutorial ug937. I have configured it as shown in the attached image. I understand the sine wave output should be bits (10 downto 0) of "m_axis_data_tdata". It is asking for s_axis_phase_tvalid, s_axis_phase_tdata for input. I cannot seem to get a clear understanding of what these are. Can someone explain in layman's terms? I also created a clock divider to drop aclk down to 12kHz as an attempt the get my sine wave into the audible range. I get no output on the board or in the simulator. Ideas???
  6. This is a response question to an earlier thread that I was not able to continue. I did as you suggested. I used the 100MHz clock as aclk. I set s_axis_phase_tvalid to '1', and I used the top bits (Most Significant Bits) of my counter (cntr) for s_axis_phase_tdata. It doesnt show any error, but it will not compile. "ERROR: [VRFC 10-665] expression has 6 elements ; formal s_axis_phase_tdata expects 8" I've tried it with 6, 8 and even all 32-bits and I get the same failure. Code: inst_1: dds_compiler_0 port map ( aclk => clk, s_axis_phase_tvalid => '1', s_axis_phase_tdata => cntr(31 downto 24), -- this is line 82 of Wave_top.vhd m_axis_data_tvalid => m_axis_data_tvalid, m_axis_data_tdata => m_axis_data_tdata); LOG DATA: Vivado Simulator 2016.4 Copyright 1986-1999, 2001-2016 Xilinx, Inc. All Rights Reserved. Running: C:/Xilinx/Vivado/2016.4/bin/unwrapped/win64.o/xelab.exe -wto 0fc31941c582466d8f4474edc8fb8bef --debug typical --relax --mt 2 -L xbip_utils_v3_0_7 -L axi_utils_v2_0_3 -L xbip_pipe_v3_0_3 -L xbip_bram18k_v3_0_3 -L mult_gen_v12_0_12 -L xbip_dsp48_wrapper_v3_0_4 -L xbip_dsp48_addsub_v3_0_3 -L xbip_dsp48_multadd_v3_0_3 -L dds_compiler_v6_0_13 -L xil_defaultlib -L secureip -L xpm --snapshot Wave_top_behav xil_defaultlib.Wave_top -log elaborate.log Using 2 slave threads. Starting static elaboration ERROR: [VRFC 10-665] expression has 6 elements ; formal s_axis_phase_tdata expects 8 [C:/Users/Toshiba-/coregen_sinewave/coregen_sinewave.srcs/sources_1/new/Wave_top.vhd:82] ERROR: [XSIM 43-3321] Static elaboration of top level VHDL design unit wave_top in library work failed.
  7. Is it possible to connect the PmodAMP2 board to active (amplified) speakers? From the schematic I see that the "sleeve" connector of the audio jack is connected to "OUT+" of the amplifier IC and not to GND as an active speaker might require.
  8. I recently purchased the Zybo, zynq development board, along with a MIC3 so that I could hopefully take in audio from the PMOD port and then process it in Arm processor, and finally output it through the audio output port. I'm having trouble getting the audio routed with the IP in vivado. I'm fairly new to the vivado IP integrator but I have some experience creating verilog projects. Has anyone used the MIC3 with the zybo, or know how to get the audio from a MIC3 in one of the PMOD ports, into the ARM for proccessing? Any help would be greatly appreciated.
  9. zybo audio

    Hi, I was trying to get started with ZYBO audio. I have followed steps as seen in tutorial. I am using Vivado 2016.2 as prescribed. But when I run the TCLfiles I have the following errors.: ERROR: [IP_Flow 19-3461] Value 'hdmi_in_ddc' is out of the range for parameter 'IIC Board Interface(IIC_BOARD_INTERFACE)' for BD Cell 'axi_iic_0' . Valid values are - Custom INFO: [IP_Flow 19-3438] Customization errors found on 'axi_iic_0'. Restoring to previous valid configuration. INFO: [Common 17-17] undo 'set_property' ERROR: [Common 17-39] 'set_property' failed due to earlier errors. How does one fix this? tia
  10. Audio Output from BASYS3

    I am working on a school project making a sound (tone/ multi-tone) generator using a BASYS3 and Vivado. I am having trouble getting the sound part out. As a test I wrote a simple VHDL program to create a 357Hz square wave. I declared an output bit 'dataout'. I ran a simulation using Aldec-HDL Student Edition and I am getting the output squareware. I am using the PmodAMP2 connected to JB1 top row. In my xdc file I have dataout assigned to A14 ##Pmod Header JB ##Sch name = JB1 set_property PACKAGE_PIN A14 [get_ports {dataout}] set_property IOSTANDARD LVCMOS33 [get_ports {dataout}] I have connected stereo headphones to the PmodAMP2 jack. I get NO sound output. To test my board and program I set all the leds to light thru the counter. They work and flicker at different rates relative to where they are in the counter. But still no sound. What I am doing wrong? Is PmodAMP2 the right add-on to use or should I try PmodR2R? It shouldn't matter, but are the headphones causing the issue? The ref. sheet says 2.5 watt output. I also have questions about outputting integer values to the PmodAMP2 or PmodR2R. The BASYS3 and Pmod Reference manuals are not helping. One of my planned files has an integer range -92000 to 92000 (roughly). Please help!
  11. How to use Audio on Zybo board

    Hello guys; Can you refer me to a quick guide about how to use Audio signal on ZYbo board? I just want to know if there is any simple tutorial about how to get data from audio jack and have in on Arm side. Appreciate your comments in advance.
  12. Getting Started w/ Audio on Zybo

    Hi everyone, I have seen discussion on this topic already in previous posts, but I am hoping someone has made a little progress and just hasn't posted yet. I'm hoping to be able to play audio (SFX & music) in a pong game I've made with Zybo. Does anyone have tips/experience on how to achieve this? FYI: I have an SD card, so that would be an option for audio file storage. Thanks for your time and effort! I am enjoying Zybo immensely so far. -Josh
  13. Audio Processor using Digilent Atlys

    I want to build an Audio Processor using Diligent Atlys. I want to know whether is it practically realizable??? I don't have dedicated faculty in my college due to which i will require help . Has anyone done it in the past so that he or she could help me or guide me if i could get stuck???
  14. Nexys Video HDMI with audio

    Hi all, I've got the Nexys Video and plan on creating an HDMI pass through with audio extraction. I've seen the IP provided from Digilent called dvi2rgb but i don't see any support for the audio that can be carried in the HDMI stream in this IP. First off is the Nexys Video capable of passing through the audio as well as video with the right IP? And if so is that IP Digilents? If not could someone point me to some IP (preferably created by Digilent) that can support audio? I have been trying to find some but a little help to clarify some things would be great. Thanks
  15. After trying about everything I could think of, I am still not able to produce any sound through the DAC on the Zybo's audio chip. I tried initializing the chip via I2C using what I think are the proper register values and the proper power on sequence, both using a core I wrote myself, and alternatively by connecting the I2C interface through to the Processing System and using Linux and i2c-tools there to set the register values from the command line. My initialization sequence includes activating the digital core (R9), enabling the DAC by setting DACSEL, unmuting the DAC, powering on both before (without Out) and after (with Out) setting the other registers and with the proper delay, and many more things. I am also pulling the active-low MUTE pin high using "i2c_m_mute <= '1';" in VHDL. I can make the chip pop and hiss by powering it on, and I think I can manage to put Line In or Mic onto the output with the right register values (not entirely sure since I had no Mic laying around, but I'm relatively sure I heard something when I improvised with some ear buds). Overall, there's strong indication that my initialization sequence is at least partially successful, but the DAC remains entirely silent. For the I2S signals, I have a 12.288MHz MCLK fed by a Clock Wizard, a 48kHz PBLRC clock, a 3.072MHz BCLK (for 64 cycles per 48kHz sample, but I also tried using half of that since I am only trying to feed 16bit data) and PBDAT aligned to that. I verified both with an ILA core and with an oscilloscope directly at the chip pins that the signals are there and look sound. Yet I cannot even make the chip produce anything digitally. Even if PBDAT is screwed up, it should at least produce some sort of random noise or clicking, no? What am I missing? Since I'm very new at FPGAs, this may be something entirely obvious. Attached is an example of what is going on on the I2S wires. I tried at least left justification and the I2S format. This is with a BCLK for 32 bits per sample (i.e. 16bit per channel), as mentioned above I also tried using a 64bit BCLK with no effect.
  16. Hello, I am trying to connect to the DAC using petalinux, but I cannot get it to work. When petalinux is booted i get "axi-i2s: probe of 43c00000.axi_i2s_adi failed with error -2", I have tried to find information about this, but so far i haven't found anything. So, what I have done: I have synthesized the template design and imported the said design into Petalinux. I have configured ALSA as this: The device tree for the axi-i2s is as follows: amba_pl: amba_pl { axi_i2s_adi_0: axi_i2s_adi@43c00000 { compatible = "adi,axi-i2s-1.00.a"; reg = <0x43c00000 0x10000>; clocks = <&clkc 15 &clkc 16>; clock-names = "axi", "i2s"; dmas = <&dmac_s 0 &dmac_s 1>; dma-names = "tx", "rx"; xlnx,bclk-pol = <0x0>; xlnx,dma-type = <0x1>; xlnx,has-rx = <0x1>; xlnx,has-tx = <0x1>; xlnx,lrclk-pol = <0x0>; xlnx,num-ch = <0x1>; xlnx,slot-width = <0x18>; }; }; I am deeply grateful for any help, or any examples showing a working DAC interface. Best regards /Jaxc
  17. Hello, I have been struggling for a while now trying to get sound on the ZyBo board. I built images with the OpenEmbedded and Yocto projects where I added the following layers: I enabled so many recipes that I couldn't remember exactly which ones. As a test, I also tried the Linaro distro provided in this tutorial: But still no sound card detected. I really need to work with the audio on this board, how can I enable it ? Thanks in advance
  18. zybo_audio_controller

    Hi everybody! I need help with a project. I'm a new user of zybo development board and I don´t know how to process audio. I want to a input audio by the line in and other sound by the mic in, and in the output I want the two signals. I need information about vivado and sdk. I have read information about the board and I understand that I need to create a new IP to the audio control. But I do not know how to program the IP block neither tha software in SDK.
  19. Nexys video looper demo

    Hi. I have implemented the Nexys Video looper demo, according to the manual, following all the steps. Unfortunately, after implement and configure the FPGA, using Vivado, the demo did not work properly, the LCD works perfectly, also the control buttons, but the sound did not appear in line out, with the headphone connected. If someone knows especial details in order to use line in and line out, different to the especified in the guide, please let me know, also if someone have implemented this demo succesfully. Thanks in advance.
  20. I've finally got my PmodMIC3 out of it's back and have it up and running. It's pretty interesting how the MEMS microphones work - it seems to be much like this, but at audio frequencies:
  21. Zybo board AUDIO CODEC

    Hey guys, We are currently two students trying to use the Audio chip(SSM2603) on the Zybo board. Currently we are unsure on how to generate a proper block design(IP) that would allow us to generate a bitstream and take in input from the mic line and send out that audio output. We were also wondering what VHDL code was used for the audio codec package. We have been trying to use the axi_i2s_adi block but are unsure on how to use it due to the lack of documentation. Kindly help us by sharing projects or ideas! Best Regards!
  22. Zybo Board and Distortion project

    Hello everyone! Current student studying Electronics, This has been my first semester with the Zybo board. I have done projects throughout the semester interfacing with multiple PMODS and on-board ports. I was wondering if anyone could help with getting me in the right direction. What I am trying to accomplish is to read Audio signals ( Analog sine waves in the ranges of 50hz-15khz) and convert to Digital values and check for Distortion with Digital processing and to possibly write code that will calculate how much distortion there is. The idea behind this project is to insure that you have a clean signal OR allow to set a certain amount of distortion. I have a background in car audio and it remains a hobby. I have worked with the on board XADC and the DA2 PMod. and understand how the process of reading analog data converting it to digital values stored in a array then sending the data back to analog. anything is appreciated! thanks.
  23. Zybo audio

    I'm trying to get some audio out of the Zybo. Here is my first attempt at an I2S noise transmiter. It doesn't work (does not produce any audio), but I can't tell if it's due to the I2S stream or my I2C codec configuration. The I2S stream looks okay to me in simulation and in ILA. I also believe i do the power-up and de-mute and DACSEL sequence properly. I'd much appreciate if someone would have a look at this attempt at an I2S transmitter and whether what it outputs actually is a valid I2S stream or not. The codec is in slave mode.. module i2s( input fclk, input rst, output ac_bclk, output ac_mclk, output ac_muten, output ac_pbdat, output ac_pblrc ); assign ac_mclk = fclk;assign ac_muten = 1'b0;assign ac_bclk = cntr[1];assign ac_pblrc = cntr[7]; reg [7:0] cntr; always @ (posedge fclk) begin if(rst) begin cntr <= 0; end else begin cntr <= cntr + 1; endend lfsr lfsr_1 (ac_bclk, ac_pbdat); endmodule module lfsr (input clk, output bit); reg [22:0] d = 1; always @(negedge clk) begin d <= { d[22:0], d[22] ^ d[17] }; end assign bit = d[0];endmodule
  24. Making your own Metronome

    Hello! For those of you out there that have a soft spot for playing music, this project is for you. As the title suggests, you can create your own adjustable metronome with parts available from Digilent Inc. You can find out how from both our Learn module and our Instructable. Have fun!