Search the Community

Showing results for tags 'artyz7'.

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • News
    • New Users Introduction
    • Announcements
  • Digilent Technical Forums
    • FPGA
    • Digilent Microcontroller Boards
    • Non-Digilent Microcontrollers
    • Add-on Boards
    • Test and Measurement
    • LabVIEW
    • FRC
    • Other
  • General Discussion
    • Project Vault
    • Learn
    • Suggestions & Feedback
    • Buy, Sell, Trade
    • Sales Questions
    • Off Topic
    • Educators
    • Technical Based Off-Topic Discussions

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


AIM


MSN


Website URL


ICQ


Yahoo


Jabber


Skype


Location


Interests

Found 5 results

  1. I have UART1 enabled on MIO 48() 49(). I can't figure out where these pins are on the board. Please help me out in finding the relevant part from the documentation. Attached is the screenshot from schematic found at: - https://reference.digilentinc.com/_media/reference/programmable-logic/arty-z7/arty_z7_sch.pdf Any help is highly appreciated. Its my first post.
  2. Hello Digilent team, I was able to integrate the bare metal HDMI out on Arty-Z7-20 thanks to your demo from here: https://github.com/Digilent/Arty-Z7-20-hdmi-out/tree/v2020.1 I wonder if you have any plan to make a petalinux version for it with HDMI output integrated on Xilinx toolchain v2020.1? If not yet, do you know where can I start? I don't see documents from Xilinx developing from scratch like this. I found a similar post here but for v2017.v: Looking forward for your advices. Thanks and best regards,
  3. Hello , I am using VIVADO 2018.2 HLx editions (Windows) Do you have the steps required program the Digilent ARTY Z7 -20 SPI flash with a standalone FPGA design? I have followed a number of web examples that claim to show the route to follow none of which work. They are either incomplete or for the wrong version of ARTY , VIVADO and SDK. Thanks
  4. Dear All, Me and a colleague of mine are facing an SPI timeout issue on a Zynq. We already posted the issue in the Xilinx forum: https://forums.xilinx.com/t5/Embedded-Linux/SPI-transfer-timeout/td-p/833550 but we did not receive any answer, yet. So I would like to ask your help. I am trying to use a TFT LCD screen with the Digilent Artyz7, exploiting the frame buffer. I created a project on Vivado that exports the Zynq PS SPI interface through EMIO. I have already deployed the linux-digilent kernel (v4.4.0) on the Zynq and I am able to see the SPI peripheral under /sys/class/spi
  5. Hi all, I started playing around with an Arty Z7 board and downloaded the hdmi out demo. As a first test, I used the bitfile from the SDK and loaded into the FPGA with the Xilinx SDK 2017.3. I guess with the provided bitfile, SDK version does not matter... JTAG jumper set. FPGA configured successfully I used the SDK terminal to connect to serial port but still do not get any output like depicted in https://reference.digilentinc.com/learn/programmable-logic/tutorials/arty-z7-hdmi-demo/start Also I do not get any signal on my display through HDMI cable. What am I do