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Found 37 results

  1. Hi, I am wondering whether the scope channel in Analog Discovery can record a voice data from a microphone.? and do signal processing such as averaging, FFT etc? Suppose, I have a mic and mic-amplifier. Can feed the output from the mic-amplifier straight to scope input? and then see the waveform in the scope mode? If so, is it then possible to save the voice data for ( say 10 seconds) and then do the processing (averaging and then to perform FFT to extract the frequency components? If so what is the best way to start? Also, if created a complex waveform in the AWG (waveform generator), can I use the scope to store the waveform and the do digital signal processing (DSP)? Thanks any ideas and comments. Best Regards Fernando
  2. hello ! i am using pmodAD5 connected with arduino uno . i am looking to use the onboard AD7193 in continuous conversion mode to measure the data , but i am unable to get the correct and desirable conversion results. Can anyone help me with this . i hereby attach the respective code and library i am using for my task. AD7193.h AD7193_Voltage_measure_final.ino AD7193.cpp
  3. Ignacas

    FPGA audio - ADC and DAC

    Good day wizards, I've tried to introduce myself here, but now I would like to ask for a comment on my thoughts. My goal is to master audio processing (mainly routing and level controls for a beginning) on FPGA. The diagram will be very simple: Audio signal generator => ADC => FPGA => DAC => Analyzer (Spectrum, THD, Level) Audio signal generator will be made of two NE555 clocks with different frequencies (say 1kHz and 15kHz) to have a difference between L and R channels. ADC will be CS5381 (24bit@48k), I2S output. DAC will be CS4390 (24bit@48k), I2S input. (later maybe something better, but for now I'll use whatever I have in a drawer). Once I get this AD-DA conversion running properly, I'll try routing output of the ADC to my ARTY A7 input and pass that signal directly to the DAC. At this point I would like to see a low noise, low jitter signal passing thru. Next step could be mixing L and R signals together, adding more converters generating AES/SPDIF signals on FPGA, etc.. But at very beginning, I have a fundamental problem with clocks. I want to run this setup at 48kHz, so I obviously need this clock and 48k*256=12.288MHz MSCLK. Playing around with PLL Clock wizard didn't gave me the desired result (still + or - couple MHz). I understand that it would not be a massive problem and I could run any weird frequency, but there will be a sync problem with external digital equipment if I get around to do, say AES/SPDIF interface. Finding XTAL trimmed to 12.288 is not a problem, but can I just hook it up to any desired pin and use it? I have also seen some posts (if I got it right) discouraging of using multiple clocks as it can get messy (inter-sync problems?). Before I dive into this, I would appreciate Your insights and critics. I will post all my story here as soon as I have something to share with You:) Thank You!
  4. MohitVerma

    Analog Shield DAC and ADC Offsets

    Hi there, I've been using the Analog Shield with a UC32 for controlling and measuring different parameters in a physics experiment. I've noticed that for certain voltages, the DAC (and ADC) both have offsets on the order of 10 - 40 mV relative the value that they are being programmed to (or being feed to by a power supply). This offset seems to be random (in that it doesn't follow a specific trend), although it is consistent for the same ADC/ADC. I've also seen that the offset pattern is different for different DAC/ADCs on the same Analog Shield and I've also tested this on different Analog Shields and still seen this issue. This error seems to be much larger than the specified offset error for the DAC and ADC. Has anyone experienced similiar DAC/ADC offset issues with the Analog Shield? And has anyone developed any clever solutions/compensation libraries to deal with this to get more precise reading?
  5. CKV

    PMOD AD1 HDL codes

    Hello, can I get the HDL files for the PMOD AD1? Exactly I need code which can take the AD1 outputs D0 or D1 to HDL module and gives me the output has 12bit number. so that I can process these 12bit numbers in subsequent modules.
  6. Hello! For a (very modest) first try with the BASYS 3 board, I'd like to measure a signal using an ADC for the BASYS 3 board I have, possibly average the signal over a set of measurements and then send this out using PWM. I'm looking for examples in VHDL, and only found one in verilog so far. And any explanation that you care to offer me. As you can tell I'm a novis and a biologist at that. I've taken (75%) of a beginners course in VHDL, but am very interested and enthusiastic. Now, hit me (with kid gloves). Thanks in advance!
  7. Hello guys, I am fairly new to FPGAs, but I have managed to get my Arty board to work with a bunch of Pmods through Vivado software with MicroBlaze. At this point, I am trying to use AXI Quad SPI for collecting data from an external ADC. I have my own 16-bit ADC (connected to a detector) which has an event flag pin that goes high when an event is detected. The flag is supposed to be latched high until the CPU responds and shifts out the 16-bit value. I wonder how can I implement such design inside my block diagram? I tried adding a SPI connector to my diagram, but as far as I see there is no pin on SPI block that I can connect my event flag to. Any help is highly appreciated. Mahdi


    I want to interface DAC and ADC with some fpga evaluation board My requirement of ADC and DAC is following DAC input ->sampling_rate=2MS/s frequency=455khz ADC Input ->Signal bandwidth=400khz i have no problem of resolution So someone please guide me or refer me some models of adc and dac along with some FPGA evaluation board that complete my requirements . Also refer me if anyone know about some board that have build in adc dac along with FPGA Any kind of help in this regard would be much appreciable
  9. Hello Digilent, I am just going to buy an ARTY A7 35T board and I have to interface an external ADC ADC7091R with it. I know it has an on board XADC but I need to do for some specific purpose. Now I have seen a Pmod of ADC7091 R given in its datasheet and I want to know that "DO ARTY A7 support pmod of ADC7091R". Thanks
  10. CKV

    ADC and DAC PMOD module

    Hello, Do we have any PMOD module which has both ADC and DAC in the same module?
  11. CKV

    ADC on Virtex Ultra scale+

    How to implement the ADC on Virtex Ultra Scale+ which doesn't have the XADC Feature? It has the one 2x6 PMOD connection. Thanks in Advance.
  12. Hello, is the ADC of Zedboard able to sample negative signals? And what are the specifications of the ADC built in? Thank You! Best regards
  13. Hello, is it possible to sample an external analog signal using the XADC? Or do I need the AMS101 Eval-Card for that? I'm using the Sony XC-HR50 analog Camera (datasheet: ), which has a CCD Sensor. I am very new to Zedboard and trying do save the picture of the camera. Thank you, kind regards The Video Output is shown below:

    SPI Interface -> Quad-SPI Flash.

    hello, I want to interface zedboard(PL-Section) with external ad7768-4 ADC board using SPI interface via FMC_LPC connector. i have following questions: 1) how i can set SPI interface in zedboard (i mean, where i can assign "sclk, cs#, sdi, sdo" pins from ad7768-4 adc board to zedboard(PL-section) ) ? 2) can I access QSPI Flash by using PL-section of zynq 7000 ? 3) what is the meaning of QSPI Feedback, where it should be connected? 4) can i use QSPI in standard mode ? please help me ! Thank you
  15. Hi. I would like to know, if it is possible to modify the sampling frequency, the number of samples of the ADC of the card Nexys 4 DDR ?. I know there are modes of use, but these depend on the registers but do not allow manipulation of these parameters. If you can, I would be grateful if you could tell me how it is possible.
  16. StudentAmsterdam

    Least PL logic intensive data gathering

    Dear all, I hated the fact the Zybo Zynq does not have a proper D/A converter on its own. So I programmed a VHDL 1-bit delta sigma modulator according to this Link. The delta sigma modulator is working as a charm, but I want to be able to set the frequency of the waveforms i am generating. I want to set the frequency of the waveform by using an 1-10V input signal. I am okay with C and VHDL but I have never used the block designs or Zynq IP & GPIO Blocks.. The PMOD connector connected to the fpga is already in use so I guess my options are. Use a external microcontroller with ADC and use SPI to the PS part of the zybo zynq. Use the XADC connect it to the PS and of course use a voltage divider or something Microcontroller and just bit bang the values directly to the PL side Are there any suggestions on the easiest way of doing this ? ps: Is it possible to do something similar to interrupts in VHDL
  17. Hi, I'm new to this. I want to know how to describe in VHDL the operation of the ADC of the Nexys 4 to view it in LEDs. Any suggestion?
  18. Hi what sort of connector cable can be used to connect afe5809 adc board to arty fpga board.

    LPC-FMC to FMC connection between ADC & ZEDBOARD

    hello, i'm new born baby in embedded system. I want to establish a communication between ADC Board to Zedboard(PL-section-xc7z020) via LPC-FMC connector. please tell me lpc fmc pin out and how those pins connected to PL(FPGA) Section of zynq (like any diagram). please help me, Thank you.
  20. With limited funds and learning curve time , trying to decide on system(s) to purchase. AD2 looks as if it suits me well for support instrumentation used for auxiliary circuit development .The software is well done and versatile The 100Ms scope sample rate and multiple device syncing lean me toward the AD2 ,but the EE is better for bread-boarding. I am not seeing much info/clarity in either the GUI interface, scripting or the SDK in using either board as a high rate DAQ. I don't want to get down to the level of the FPGA itself , looking for functional tools to make progress with other interests . If neither of these will support fast DAQ, then I will go with the EE for breadboarding and look elsewhere for seperate DAQ. I would like to stay in same product ecosytem, there are impossibly many options, so it looks like I need to pick a "side".
  21. sychu

    Sampling Frequency

    Hello, 1. I'm just wondering if I can expect to get time sequence which has 10ns interval (ADC fs=100MHz) when I measure the Analog input from my circuit. (AD, AD2) 2. And because of 16k samples buffer, I only can measure(capture or save data) during 0.16msec (1/100MHz*16k). Is there any way to increase the number of samples to save? 3. Can I change the sampling frequency also? Best regards, Sung
  22. energyzappa

    Zero error - Analog Shield ?

    With the Analog shield mounted on an Arduino Leonardo, I'm seeing a zero error at each of the analog inputs with a zero voltage input or the Arduino's Ground connected to the analog pin. Using the signed read in non-differential mode, the A0 input reads -65 counts, A1 input reads -75, A2 input reads 85 and A3 reads -65. Is there any adjustment that I can make to the board to reduce this zero error? This zero error persists even when I switch from powering the board through the USB to a wall wart power supply. Thanks
  23. Hello ! I'm currently working on a project which consists in designing a digital lock-in amplifier on a FPGA board. For this, I am using a Nexys 4 DDR and an Analog Device's ADC (EVAL AD7984 PMDZ). My first goal is to interface properly the ADC component with the FPGA using a Pmod port. I have some basics knowledge about the use of Vivado so that's why I am asking you about this. I followed the tutorials about "getting started about MicroBlaze" to follow then "using Pmods IP". My question is : When I followed the first tutorial mentionned above, we created a a basic Microblaze block design. Do I have to use all this design or is it possible to do easier ? And, do I have to design it with MicroBlaze or can I just write some VHDL code ? I want in a first part, to give a signal input in the ADC and then, light a LED on the board to confirm that the FPGA is well connected with the ADC. Can you, please, give me a plan to achieve my goal ? I don't ask for a solution, I want to manage it by myself, but just some help to know what are the steps I have to follow. Thank you very much ! Have a good day !
  24. Hi, I want to use the ADC port with 8 bit accuracy in basys3 board using system generator for vivado. How can I do this? When I specify IOB location constraints in gateway-in, it requires me to set the number of bits to 1 which is a problem because I need 8 bits to read my analog input. How do I do this? I am not able to define non-memory mapped ports because the System generator board description builder(SBDBuilder) is not available. There is also no function defined as 'xlSBDBuilder'. Matlab shows the error >> xlSBDBuilder; Undefined function or variable 'xlSBDBuilder'. Kindly help, Thank you
  25. Two questions... many thanks in advance: 1) Per, ‚Äč"The Analog-to-Digital input converter (ADC) and Digital-to-Analog output converter (DAC) both use the standard Arduino form factor SPI bus pins and use independent chip selects." Question: For those of us developing our own library variants, what are the CS numbers? I am not seeing this documented. Update: From the attached snippet of the schematic, and the likelihood that "CS" = "SYNC" = "SYNCN" = "CSN" = "SS" among other possible nomenclature, is CS for the ADC header pin 3, and CS for the DAC header pin 6? (Also see attached close-up of the Shield's header, which suggests pin 0 on P7 is pin 0 for the Arduino Uno at least. Note the nomenclature is clear on the screen-printing next to the header: ADCCS and DACCS.) Update: Argh! The schematic pin numbering is 1-based; the silk-screened header pin numbers on the Shield are 0-based! ...Really now, this all ought to be documented unambiguously and consistently. SO... are the pin numbers for the chip selects for ADC and DAC 5 and 2, respectively, for the Uno? 2) From the same document, "The jumper needs to be set for whether the connected board uses IOREF, 3V3, or 5V0 for the I/O for the SPI interface." Question: Which setting is needed for which supported Arduino board? That is: For the chipKIT Uno32, the jumper should be ____________For the chipKIT UC32, the jumper should be ____________ For the chipKIT Max32, the jumper should be ____________For the chipKIT WF32, the jumper should be ____________For the Arduino Uno, the jumper should be ____________ As a bonus, suggestions for determining the correct jumper setting from a schematic would be really handy.