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Found 8 results

  1. vlad

    Pmod Step without ip?

    Where is the IP for the Pmos step ? The motorfeedback folder doesn't contain a pmod . Those 2 projects that I found don't have designs .If I try to update their Vivado version a popup comes and tries to download latest version of Vivado even if I use the last one. http://www.instructables.com/id/How-to-Control-a-Stepper-Motor-With-an-FPGA/ http://www.instructables.com/id/Using-the-PmodJSTK-to-Control-Stepper-Motors-on-th/
  2. Hello I am working on a project for creating Demos using the DSDB and PMODs inputs. The sensors I am using does not show much information how to write/read basic data. I would like to send the data then receive/read the sensor data. See the sensors I am using. https://reference.digilentinc.com/_media/pmodgyro2/pmodgyro2_rm.pdf (PmodGYRO2) https://reference.digilentinc.com/_media/pmod:pmod:pmodALS_rm.pdf (Pmod ALS) http://store.digilentinc.com/pmod-acl2-3-axis-mems-accelerometer/ (Pmod ACL2) Any information about the routines for reading the sensor would be very useful. I am using LabVIEW and USB-8451 for testing the sensors (I can test the routines using the USB first). the last tests I have made it gave me much information that did not match when I moving the accelerometer as an example. Regards
  3. I've been trying to run a OLEDRGB display on my Arty, using the sample pMod learnable and Vivado on my new machine. It had worked perfectly on my old machine, but unfortunately on the new machine I'm getting some issues with the clocking - it's running roughly 1000 times slower (I checked) than it actually should be. I get some critical warnings when I try to make a bitstream: [Common 17-55] 'get_property' expects at least one object. ["/home/wanderso/Tools/VivadoProjects/ARTY_Display_Attempt_2/ARTY_Display_Attempt_2.srcs/sources_1/bd/system/ip/system_PmodOLEDrgb_0_0/ip/PmodOLEDrgb_axi_quad_spi_0_0/PmodOLEDrgb_axi_quad_spi_0_0_clocks.xdc":51] That warning appears in 5 other places as well. Digging a bit deeper, I found this critical warning in the tcl process- CRITICAL WARNING: [IP_Flow 19-4965] IP PmodOLEDrgb_axi_quad_spi_0_0 was packaged with board value 'digilentinc.com:zybo:part0:1.0'. Current project's board value is 'digilentinc.com:arty:part0:1.1'. Please update the project settings to match the packaged IP. Putting these two things together, I *think* it indicates that the pMod IP files I have are for Zybo, and I'm supposed to have the version for Arty? But I used the most recent board files and ip/ifs from Digilent's github. Could anyone help me with this?
  4. After successfully creating and running the Microblaze example project on my Nexys4DDR, I went on to create the project that walks through how to use the various Pmods. I followed the instructions carefully, and succesfully generate the bitstream and export the HW including bitstream. The SDK launches fine as well. However, when I go to create the new empty application, I receive the following error, "Project cannot be created. Reason: Internal error". When I click on "Details>>" I read the following: Internal Error: Failed to closesw "D:/Projects/FPGA/IPMod1/IPMod1.sdk/pmods_bsp/system.mss" Reason: Cannot close sw design 'D:/Projects/FPGA/IPMod1/IPMod1.sdk/pmods_bsp/system.mss'. Design is not opened in the current session. I notice first and foremost that the pmods_bsp directory doesn't exist under the IPMod1.sdk folder. Of course, this means also that none of the referenced files from that folder exist either. This would seem to be the root of the problem. However, I have no idea why this folder wasn't created nor how to resolve the issue. Any help is appreciated. Dave I also found the following in the SDK.log. I'm not sure if this helps. From what I can tell the generate_bsp process is failing. 11:42:18 ERROR : (XSDB Server)ERROR: [Hsi 55-1545] Problem running tcl command ::sw_standalone_v5_5::post_generate : couldn't execute "mb-ar": invalid argument while executing "exec $archiver -d $libgloss_a _interrupt_handler.o" (procedure "::sw_standalone_v5_5::post_generate" line 18) invoked from within "::sw_standalone_v5_5::post_generate standalone" 11:42:18 ERROR : (XSDB Server)ERROR: [Hsi 55-1443] Error(s) while running TCL procedure post_generate() 11:42:18 ERROR : (XSDB Server)ERROR: [Hsi 55-1450] Error: running generate_bsp. 11:42:18 ERROR : Failed to closesw "D:/Projects/FPGA/IPMod1/IPMod1.sdk/pmods_bsp/system.mss" Reason: Cannot close sw design 'D:/Projects/FPGA/IPMod1/IPMod1.sdk/pmods_bsp/system.mss'. Design is not opened in the current session. 11:42:32 ERROR : (XSDB Server)ERROR: [Hsi 55-1545] Problem running tcl command ::sw_standalone_v5_5::post_generate : couldn't execute "mb-ar": invalid argument while executing "exec $archiver -d $libgloss_a _interrupt_handler.o" (procedure "::sw_standalone_v5_5::post_generate" line 18) invoked from within "::sw_standalone_v5_5::post_generate standalone" 11:42:32 ERROR : (XSDB Server)ERROR: [Hsi 55-1443] Error(s) while running TCL procedure post_generate() 11:42:32 ERROR : (XSDB Server)ERROR: [Hsi 55-1450] Error: running generate_bsp. 11:42:32 ERROR : Failed to closesw "D:/Projects/FPGA/IPMod1/IPMod1.sdk/pmods_bsp/system.mss" Reason: Cannot close sw design 'D:/Projects/FPGA/IPMod1/IPMod1.sdk/pmods_bsp/system.mss'. Design is not opened in the current session. 11:42:56 ERROR : (XSDB Server)ERROR: [Hsi 55-1545] Problem running tcl command ::sw_standalone_v5_5::post_generate : couldn't execute "mb-ar": invalid argument while executing "exec $archiver -d $libgloss_a _interrupt_handler.o" (procedure "::sw_standalone_v5_5::post_generate" line 18) invoked from within "::sw_standalone_v5_5::post_generate standalone" 11:42:56 ERROR : (XSDB Server)ERROR: [Hsi 55-1443] Error(s) while running TCL procedure post_generate() 11:42:56 ERROR : (XSDB Server)ERROR: [Hsi 55-1450] Error: running generate_bsp. 11:42:56 ERROR : Failed to closesw "D:/Projects/FPGA/IPMod1/IPMod1.sdk/pmods_bsp/system.mss" Reason: Cannot close sw design 'D:/Projects/FPGA/IPMod1/IPMod1.sdk/pmods_bsp/system.mss'. Design is not opened in the current session. 11:51:58 ERROR : (XSDB Server)ERROR: [Hsi 55-1545] Problem running tcl command ::sw_standalone_v5_5::post_generate : couldn't execute "mb-ar": invalid argument while executing "exec $archiver -d $libgloss_a _interrupt_handler.o" (procedure "::sw_standalone_v5_5::post_generate" line 18) invoked from within "::sw_standalone_v5_5::post_generate standalone" 11:51:58 ERROR : (XSDB Server)ERROR: [Hsi 55-1443] Error(s) while running TCL procedure post_generate() 11:51:58 ERROR : (XSDB Server)ERROR: [Hsi 55-1450] Error: running generate_bsp. 11:51:58 ERROR : Failed to closesw "D:/Projects/FPGA/IPMod1/IPMod1.sdk/pmods_bsp/system.mss" Reason: Cannot close sw design 'D:/Projects/FPGA/IPMod1/IPMod1.sdk/pmods_bsp/system.mss'. Design is not opened in the current session.
  5. Dev

    Accessing of PMODs in ZYBO

    Hello, Iam new working with ZYBO. I would like to how to access the PMODs in the ZYBO. For example connecting a LED in one of the PMOD and blinking it. Iam using Vivado 15.2 Version. Thanks in advance, With Regards, Dev
  6. Hello All, I am new to these forums, but I am looking for some guidance on a home design I am working on. I have 2 Nexys2 boards that I want to attach transceivers to each of them so I can send data between the two Nexys2 boards. Does anyone know of any solution available to accomplish this. I know the Nexys2 boards are old, but I own 2 of them and it will save me money to use them versus buying 2 new Xilinx FPGA boards to accomplish this task. Please advise if anyone is aware of possible solutions for this task. Thanks Sincerely, MH301
  7. bahare

    pmod on zedboard

    i work whit pmod that producted whit maxim company , maxim company get me a file project for pmods in this link http://content.maximintegrated.com/en/design/tools/applications/evkit-software/index.mvp/id/1064 but in this project every pmod port on zedboard luanch alone , i want two port pmod work together can you help me ??
  8. Can we use Basys2 Pmods (GPIOs) for serial communication with outside world...? I want to implement a UART code on Basys2 board and want to use one of the Pmods (GPIOs) as Tx and Rx pins to establish a serial communication with outside world.. Can I do that..?