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Found 194 results

  1. Hey all, First off, I apologize - I'm at work, now, with no access to the hardware, o-scope, etc. So all from memory for now, until I can get some time at home.... NOTE: All development being done under Xilinx ISE 14.7 WebPack. Target platform is an Opal Kelly XEM3005 (Xilinx Spartan 3E) Day 1: Wrote & sim'd Verilog to drive a PMODAD1 12b ADC. Seemed to work as planned. Day 2: Tried interfacing to an Opal Kelly XEM3005 (Spartan 3E) board with 3.3V logic & power. No joy. Funky stuff going on. Began troubleshooting. Day 3: Wrote code for Raspberry Pi Zero W (using WiringPi) to drive the AD1. Everything works as it should. Data reads work as close to perfect as I can ask for. Day 4: Continue troubleshooting FPGA - realize my constraints file is no bueno, and is assigning FPGA pins incorrectly. Fixed that. (So, reasonably sure that constraints file is copacetic) Day 5: Wrote code to drive a PMOD DA2 2-channel 12b DAC. Code Sim'd. Works well. Integrated into FPGA - code works well, DA2 works as advertised. Also works well with OK's FrontPanel - I can give a command from the PC, and the DA2 spits out the appropriate voltage. (This was another step to validate FPGA platform functionality & correctness). Day 6: Re-code and re-sim DA1 Verilog. Works as expected. Day 7: Integrate code onto XEM3005 - still no joy. Probe with oscilloscope: Power good - 3.3V, rock solid Ground good: little to no noise. Chip Select (CS) looks good - ~990kHz rate, normally high, Goes low for readout periods. Less than perfect due to being on a protoboard connected via a 6: cable. Serial clock (SCK) looks good - ~16MHz, only active during CS Low periods, high when CS is high (quiet time) DO and D1 outputs - constant low. A fair amount of digital noise. Sometimes, having a probe attached to D0 or D1 with the other probe attached to SCK or CS will couple noise in to the FPGA, giving me a noisy signal that is meaningless (except for the fact that it tells me my inputs are working - or so I think) It appears as though (bare with me - I'm an analog guy) the lines are heavily loaded - i.e., something is pulling the lines to ground. I see on the AD1 datasheet that the outputs are protected by 100 Ohm resistors, so this seems a potential (likely?) culprit (?) Not instantiating IOB's in my code, but those normally aren't necessary except to override defaults in the constraints file. Double- and triple-checked that the D0 and D1 ports are set up as inputs. Constraints file does not explicitly turn on Pull-ups or pull-downs. (LOGIC_3v3, IIRC) Recoded main fixture to move connections to different pins. No change in results - everything (appears) identical. Day 8: Just got home - did some double checking and disconnected the PMOD outputs from the FPGA: With the FPGA disconnected, the signals look pretty darned good: Took some quick measurements of the FPGA input pins - they seem to hava a constant ~0.75V on them with quite a bit of digital trash... This is clearly (I think) an FPGA setup problem.. So, here I am... Looking for clues. Anyone have any? Thanks in advance
  2. herve

    PMod AD4 (16 bits/1MSPS)

    Dear all, Has Digilent stopped manufacturing and selling the Pmod AD4 (16 bits and 1 MSPs)? I can not find it online. Thank you. B.R Herve
  3. Hi there, I am in need of help communicating with my Pmod AD5 using the SPI on raspberry pi 3. I am pretty new to SPI and have troubleshooted and searched the web for solutions over the past week but have yet to solve this problem. Here are some of the steps that I have done: 1) managed to read values using the Arduino Library linked on the product page and with an Arduino UNO, by connecting VCC of Pmod AD5 to 5V (I am not sure what I cannot read anything when connected to 3.3V) 2) understood what SPI is about and what the Arduino Library is doing (or what I think was logical) - read through the whole AD7193 datasheet to understand the registers etc.. 3) extracted the outputs (Binary/hexa format) that the Arduino was sending to the Pmod AD5, understood them, and attempted to use them in raspberry pi with the spidev library but with no progress .. 4) tested by raspberry pi's SPI (they are enabled) using the same spidev library and successfully communicated and got values from a simpler ADC: mcp3008 using this 5) checked the wiring to ensure everything is intact and correctly connected For my application, I intend to read ADC values up at speeds up to 1kHz over 2 channels and hence have chosen this Pmod AD5. For testing wise, I have connected a potential divider across A1 and A2 on the AD5 and am able to read the voltage changes when using Arduino but not in raspberry pi 3. Here's my python code using the spidev on raspberry pi 3 (have connected to CE0): ####################### START OF CODE ################ import spidev import time spi = spidev.SpiDev() spi.open(0,0) spi.max_speed_hz = 50000 spi.mode=0b00 resp = spi.xfer2([0xFF, 0xFF, 0xFF, 0xFF, 0xFF]) print('Resetting...', resp) time.sleep(0.5) ##resp = spi.xfer2([0x08, 0x18, 0x00, 0x60]) ##print('Enable DAT_STA Bit', resp) ##time.sleep(0.5) resp = spi.xfer2([0x10, 0x00, 0x01, 0x10]) print('Set PGA Gain = 1, Buffer = 1', resp) time.sleep(0.5) ##resp = spi.xfer2([0x08, 0x18, 0x00, 0x64]) ##print('Setting filter rate select bits to 100', resp) ##time.sleep(0.5) ## ##resp = spi.xfer2([0x08, 0x98, 0x00, 0x64]) ##print('Initiate internal calibration, starting w zero-scale', resp) ##time.sleep(0.5) ## ##resp = spi.xfer2([0x08, 0xB8, 0x00, 0x64]) ##print('Full-scale calibration...', resp) ##time.sleep(0.5) while True: #choose channel resp = spi.xfer2([0x10, 0x00, 0x01, 0x00]) resp = spi.xfer2([0x58, 0x00, 0x00, 0x00]) time.sleep(0.1) print('data:', resp) ####################### END OF CODE ################ Here's what most of my output looks like when I run the code (kind of the same code regardless of whether I have or not have anything connected in A1/A2 - it is unreactive even when I connect my potential divider and change the potential): Resetting... [254, 170, 128, 193, 255] Set PGA Gain = 1, Buffer = 1 [0, 0, 0, 0] data: [0, 0, 0, 0] data: [0, 0, 0, 0] data: [0, 40, 128, 0] data: [0, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 232, 191, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 232, 191, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 232, 191, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 232, 191, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 232, 191, 255] data: [255, 255, 255, 255] etc... etc... This was the code I used to successfully read from the simpler MCP3008 ADC: ####MCP3008 ## adcnum = 0 #### r = spi.xfer2([1, (8+adcnum)<<4,0]) ## r = spi.xfer2([1, 0x80, 0]) ## print(r) #### result = ((r[1]&3) << ūüėé +r[2] #### print(result) ## time.sleep(0.1) For more clarity, this is the Arduino code that I was using and got working with UNO: /************************************************************************ * * Test of the Pmod * ************************************************************************* * Description: Pmod_AD5 * The result of the A / D conversion of the AIN1 channel is displayed on the serial monitor. * * * Material * 1. Arduino Uno * 2. Pmod AD5 (do not touch the jumper and * dowload library https://github.com/annem/AD7193) * ************************************************************************/ #include <SPI.h> // Call of libraries #include <AD7193.h> AD7193 AD7193; // Creation of the object AD7193 unsigned long valeur; float tension; void setup() { Serial.begin(9600); // initialization of serial communication Init_AD7193(); } void loop() { valeur = AD7193.ReadADCChannel(0); // conversion A/N on input 1 valeur = valeur >> 8; // Extraction of value tension = AD7193.DataToVoltage(valeur); // Recovery of tension Serial.println(""); Serial.print("Valeur="); Serial.print(valeur); Serial.print('\t'); // tabulation Serial.print("Tension="); Serial.print(tension); Serial.println("V"); } // Initialisation du module Pmod AD5 void Init_AD7193(void) { AD7193.begin(); // initialization of Pmod AD5 module AD7193.AppendStatusValuetoData(); // configuration of Pmod AD5 module AD7193.SetPGAGain(1); AD7193.SetAveraging(100); AD7193.Calibrate(); AD7193.ReadRegisterMap(); } Would highly appreciate if anyone can help to give me tips on how to proceed or whether I am doing or understanding anything wrongly. Thank you very much.
  4. Hello, I have combed through the forums but still have not found the answer I am looking for. I have the Arty board and Vivado 2015.4. I can create a project and I can select the Arty board in that process. I create a Block diagram on which to start building my 'circuit'. At this point I try two different ways to get a pmod port on the board: I click on the 'Board' tab and I find all the input and output ports (led, led_rgb, buttons, switches, spi, etc and Connector JA thu JD). I try and bring a JA onto the block diagram and get a message "Conn JA board component cannot be connected because no possible options to connect". Second thing I try is to click on 'Add IP' and select AXI_GPIO. Double click that and have the option to re-customize this block. Under 'Board Interface' is a drop down menu with , again, all the input/output items on the Arty board, but no pmod ports. I have tried this with and without bringing in the latest constraints file (from Github) with the same negative results. What does it take to get the pmod ports (Connectors JA-JD) on the block diagram? Switches and buttons and leds do move to the Block Diagram and they create an AXI block when they do. So what am I missing? Thank you for your time and help.
  5. Hi, My setup is using Avnet Ultrazed board with PMOD AD1. Also I am using Xilinx Vivado & SDK 2019.1. I am successfully being able to use 1 channel of the PMOD AD1. I am trying to use both the ADC channels on the PMOD AD1. As the PMOD libraries has no board support files for the Avnet Ultrazed board I went ahead and created a QSPI IP block to get a single channel working. I am having trouble getting the second channel working. Few doubts I have are: 1. For the QSPI IP block, should I use it in standard mode or Dual SPI mode. (I have set the data pins as MISO. Also selected the number of slaves as 1) 2. In the C code how do I switch between the 2 ADC channels as the 2 slaves are connected to the same chip select. I have set the slave select in initialize as --> XSpi_SetSlaveSelect(SpiInstancePtr, 0x01); 3. Should I use manual slave select or automatic slave select? --> XSpi_SetOptions(SpiInstancePtr, XSP_CLK_ACTIVE_LOW_OPTION | XSP_MASTER_OPTION | XSP_MANUAL_SSELECT_OPTION); Thanks!
  6. Hi I am trying to interface PMOD Wifi with PMOD ALS on a Digilent Zedboard. The idea is to display the ALS values on the HTML Page(default PinsPage.htm) every few seconds. I am stuck with the Application Code. I have checked the code which is used to read switches data to read the LED state and turn it on or off. Do I need to write code similar to that inorder to interface the ALS sensor and display its values on the HTML Page. Or is there any other method to achieve the same. Kindly suggest a way forward. I've attached the block diagram for reference. Thanks in advance.
  7. Hello, I'm a student and currently working on my final project including Basys 3 board and wifi pmod. I'm trying to get started working with the module to understand how it works. This is my first project working with Pmods. I've been using the Getting Started with Digilent Pmod IPs tutorials. I added the newest Vivado library including the PmodWifi IP and I bulit a block design with the MicroBlaze and other GPIO IPs. I followed the instructions of the tutorials and got to the part of validating the design, there I got a warning saying few of the wifi pmod pin are not connected. I've got a few other warnings and errors so I really don't understand what went wrong. If anyone know what the issue is and can help me, that would be awesome! Also I'm looking for an example project for wifi pmod using Microblaze to learn from. I'm attaching some screenshots of my project. thanks, Netanel.
  8. I purchased a PMOD-BT2 recently and since (according to your documentation) the SPI connector uses the same power as the regular PMOD connector, I though I could just connect it via the SPI header (not supplied), for programming. Strangely enough, the FPGA board (a Nexys4-DDR) would not power up. An investigation reveals a strange fact: according to an ohm-meter the power on the SPI header is reversed compared to your documentation. I would appreciate it if someone from Digilent could confirm this from the PCB schematics and update your documentation ASAP, as well as issue an errata, because connecting the power the wrong way round has a habit of blowing things up.
  9. I would like to know the crystal ppm for the crystal populated on PMOD-RTCC (using the MCP791410T real time clock calendar). Is a BOM available for this module?
  10. I'm working with a Xilinx Spartan-7 (Arty S7-25) FPGA and was wondering if the "P" and "N" for the PMOD differential pairs are reprogrammable or swappable? Will swapping them damage any components or just not work? I notice their naming scheme but is there any significance beyond that. The banks I'm referring to are the JA and JB PMOD connections (See JB bank below). Thank you!
  11. i wanted to interface multiple digital serialiser with arty A7 35T board through pmod pins. And transmit the same data through UART. help me with the verilog code and other resource.
  12. Trying to connect the MTDS PMOD to my CoraZ7-07S FPGA board. I used the Digilent MTDS IP but I'm having trouble figuring out how to connect it to PMOD port JB on the Cora board. Read on another answer that I should use JD by default but that's not an option in Cora. Vivado (2019.1) also warns that the IP was packaged for arty board but assume that's not an issue for me other than the JD issue. I saw on another post that I need to edit the XDC file to change the PMOD connector but I don't see how I can do that since the MTDS PMOD doesn't show on my constrains file. Thinking about wiring it manually. Any suggestions? Would appreciate any help.
  13. Hi Digilent staff, and fellow forum members, Just wondering if you guys had considered making a USB HID -> PS/2 PMOD board? I was thinking of something like the circuit on the Nexys 3,4 boards which uses a PIC to convert a USB keyboard to PS/2 compatible signals. Would be handy for using newer USB keyboards/mice on PMOD socket equipped FPGA boards. PS/2 devices are becoming harder to find brand new. I (for one) would be interested in a few. Kind regards, Leslie
  14. Hi, I would like to know what IO standard would I use if I want to input a differential signal to two adjacent PMOD headers on PMOD JB. This differential signal will be an input to a buffer on the FPGA. The current xdc file on github uses LVCMOS33 as a default standard as shown below. set_property -dict { PACKAGE_PIN E15 IOSTANDARD LVCMOS33 } [get_ports { Input_data }]; #IO_L11P_T1_SRCC_15 Sch=jb_p[1] set_property -dict { PACKAGE_PIN E16 IOSTANDARD LVCMOS33 } [get_ports { Input_data }]; #IO_L11N_T1_SRCC_15 Sch=jb_n[1] Would it be fine if I use LVCMOS33 or should I use another IO standard and if so which one should I use. I am using the Arty A7 100t board. Thank you
  15. Hello, I am looking for a simple PMOD breakout board so that I can wire a cable to it. The cable goes to an RF front end eval board that has inconvenient connections. I would like the break out board to plug directly into the 12 pin PMOD connectors of my FPGA board.
  16. We are using PL section of the Zynq7000 to transfer data to another module b y creating a SPI IP Inside the PL. We want to know that the PMOD pins availvalble on the Zybo-Z710 board are using open drain or push-pull configuration ? Do they have something like a internal pull-up resistor ? Please let me know.. Regards Amol
  17. I am learning how to operate an FPGA, and I have to input a signal (which in itself is the output of a discriminator), and analyze it through a Basys3 FPGA. Looking at the available ports on the board, I'm guessing that it could be done using the Pmod ports, but even after hours of googling and going through the manuals, I failed to know which data ports to use, and how to read the signal after I've input it through the board. I've got references to some boards, in which GPIO ports are explicitly labelled, but I don't see any such labeling on the Basys3. So, it'd be really helpful if someone can provide me with any insight regarding this. Any other references or links would also be greatly appreciated. I've already gone through the basic tutorials (like lighting the led using the switch. I just want to know how to use the input ports, and analyze my signal. Thank You
  18. Hello, I am currently working with the FPGA Board ZYBO Z7020. Part of my current task is: Apply a voltage to the AD2, the FPGA contains some logic and has to output the same Voltage with a DA2. I configured a VHDL I2C Master for communication with the AD2. I also attached an image with how I added the pullup Resistor in the schematic. I am using the internal voltage reference, which equals VCC = 3,3V. I am also watching the SDA Line with an oscilloscope to have a look at the data the ADC sends to me. I can apply an input voltage (DC) to the AD2 with a Waveform Generator. The AD2 works in High Speed mode (1MHz Clock). The configuration I use is: "00010011". The big problem with the SDA Data from the AD2 is: It reaches its maximum at 1,65V Input Voltage, so at 1,65V input voltage, all bits of the 12 bit data are '1'. I just can't figure out, why that's the case. The jumper on the AD2 board is set to "REF", the configuration tells the AD to use this reference and not an external one and the VCC at the PMOD surely delivers 3,3V. Any idea about what I am doing wrong? EDIT: I am only using Channel 0 for conversion.
  19. Hi all, This is a quick and dirty howto. This howto describes how to use I2C modules (onboard and through PMOD connector) under embedded Linux. I've chosen to build my own Linux distro based on Linux kernel source for MicroBlaze softcore and busybox project for the init RAM DISK. My board is the Nexys4 DDR board. If you respect the following requirements for the HW design compatible with Linux, you can use Petalinux too. HW Vivado requirements (according to Xilinx UG1144) design to boot Linux: MicroBlaze with MMU support by selecting either Linux with MMU or Low-end Linux with MMU configuration template in the MicroBlaze configuration wizard. External memory controller with at least 32 MB of memory. Dual channel timer with interrupt connected. UART with interrupt connected. Ethernet with interrupt connected. Note that all peripherals you use must be interrupt capable. For the UART peripheral, if you have not enabled interrupts, you have no Linux console outputs. For the Nexys4 DDR, you can follow this online tutorial: https://reference.digilentinc.com/learn/programmable-logic/tutorials/nexys-4-ddr-getting-started-with-microblaze-servers/start At this stage, for the Nexys4 DDR board, you can add the onboard i2C temperature sensor (ADT7420) that uses the AXI IIC IP block. I've added a second external temperature sensor (PMOD TMP3) connected to PMOD JA pins of the Nexys4 DDR board. I've chosen to connect SCL TMP3 pin to JA1 PMOD JA pin (C17 FPGA pin) and SDA MP3 pin to JA2 PMOD JA pin (D18 FPGA pin). You connect GND and 3V3 pins from PMOD JA connector to corresponding TMP3 pins. You have finally 4 pins to connect. You obtain the Vivado design shown below. Notice that both AXI IIC IP blocks have interrupts connected for Linux compatibility. For the TMP3 sensor, I have an external port named temp3_sensor. I've created a XDC file containing: set_property -dict { PACKAGE_PIN D5 IOSTANDARD LVCMOS33 } [get_ports { eth_ref_clk }]; # Sch=eth_ref_clk set_property -dict { PACKAGE_PIN C17 IOSTANDARD LVCMOS33 } [get_ports { tmp3_sensor_scl_io }]; set_property -dict { PACKAGE_PIN D18 IOSTANDARD LVCMOS33 } [get_ports { tmp3_sensor_sda_io }]; You can see that: tmp3_sensor_scl_io signal is for SCL I2C signal. tmp3_sensor_sda_io signal is for SDA I2C signal Please respect notation: xxx external I2C port gives xxx_scl_io and xxx_sda_io signal names in the XDC file. Generate .bit file. Launch Vivado SDK tool, install the device tree plugin and generate Device Tree files. You can follow this link: https://numato.com/kb/neso-microblaze-linux-run-linux-neso-artix-7-fpga-module/ Copy the generated pl.dtsi file (under project_1/project_1.sdk/device_tree_bsp_0/ directory) into arch/microblaze/boot/dts/ Linux directory. Use the generated system-top.dts file (under project_1/project_1.sdk/device_tree_bsp_0/ directory) to create the xilinx.dts file into arch/microblaze/boot/dts/ Linux directory. Be carefull with stdout options in the xilinx.dts file if you want Linux output enabled. Mine is: /dts-v1/; /include/ "pl.dtsi" / { chosen { bootargs = "console=ttyUL0,9600"; linux,stdout-path = &axi_uartlite_0; stdout-path = &axi_uartlite_0; }; aliases { ethernet0 = &axi_ethernetlite_0; serial0 = &axi_uartlite_0; i2c0 = &axi_iic_0; i2c1 = &axi_iic_1; }; memory { device_type = "memory"; reg = <0x80000000 0x8000000>; }; }; &axi_ethernetlite_0 { local-mac-address = [00 0a 35 00 00 00]; }; Generate your init RAM Disk for root File sytem. I suppose that you can do this. Generate your Linux kernel. I suppose that you can do this: $ make ARCH=microblaze CROSS_COMPILE=microblazeel-xilinx-linux-gnu- simpleImage.xilinx -j 4 Program the FPGA device and download the simpleImage.xilinx file (kernel + init RAM Disk) under arch/microblaze/boot directory into RAM with the JTAG interface and finally execute. That's all folks! Ramdisk addr 0x00000000, Compiled-in FDT at c03ad4f8 Linux version 4.14.0-00493-gb68293ad2c93-dirty (kadionik@ipcchip) (gcc version 8 setup_cpuinfo: initialising setup_cpuinfo: Using full CPU PVR support wt_msr_noirq setup_memory: max_mapnr: 0x8000 setup_memory: min_low_pfn: 0x80000 setup_memory: max_low_pfn: 0x88000 setup_memory: max_pfn: 0x88000 Zone ranges: DMA [mem 0x0000000080000000-0x0000000087ffffff] Normal empty Movable zone start for each node Early memory node ranges node 0: [mem 0x0000000080000000-0x0000000087ffffff] Initmem setup node 0 [mem 0x0000000080000000-0x0000000087ffffff] On node 0 totalpages: 32768 free_area_init_node: node 0, pgdat c0525af4, node_mem_map c07a2000 DMA zone: 256 pages used for memmap DMA zone: 0 pages reserved DMA zone: 32768 pages, LIFO batch:7 pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768 pcpu-alloc: [0] 0 Built 1 zonelists, mobility grouping on. Total pages: 32512 Kernel command line: console=ttyUL0,9600 PID hash table entries: 512 (order: -1, 2048 bytes) Dentry cache hash table entries: 16384 (order: 4, 65536 bytes) Inode-cache hash table entries: 8192 (order: 3, 32768 bytes) Memory: 121948K/131072K available (3765K kernel code, 121K rwdata, 1312K rodata) Kernel virtual memory layout: * 0xffffe000..0xfffff000 : fixmap * 0xffffe000..0xffffe000 : early ioremap * 0xf0000000..0xffffe000 : vmalloc & ioremap NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 irq-xilinx: /amba_pl/interrupt-controller@41200000: num_irq=5, edge=0x6 /amba_pl/timer@41c00000: irq=1 clocksource: xilinx_clocksource: mask: 0xffffffff max_cycles: 0xffffffff, max_is xilinx_timer_shutdown xilinx_timer_set_periodic sched_clock: 32 bits at 100MHz, resolution 10ns, wraps every 21474836475ns Calibrating delay loop... 49.15 BogoMIPS (lpj=245760) pid_max: default: 4096 minimum: 301 Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) random: get_random_u32 called from bucket_table_alloc+0x2e4/0x35c with crng_ini0 clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 191s NET: Registered protocol family 16 clocksource: Switched to clocksource xilinx_clocksource NET: Registered protocol family 2 TCP established hash table entries: 1024 (order: 0, 4096 bytes) TCP bind hash table entries: 1024 (order: 2, 20480 bytes) TCP: Hash tables configured (established 1024 bind 1024) UDP hash table entries: 128 (order: 0, 6144 bytes) UDP-Lite hash table entries: 128 (order: 0, 6144 bytes) NET: Registered protocol family 1 RPC: Registered named UNIX socket transport module. RPC: Registered udp transport module. RPC: Registered tcp transport module. RPC: Registered tcp NFSv4.1 backchannel transport module. random: fast init done Skipping unavailable RESET gpio -2 (reset) workingset: timestamp_bits=30 max_order=15 bucket_order=0 io scheduler noop registered io scheduler deadline registered io scheduler cfq registered (default) io scheduler mq-deadline registered io scheduler kyber registered Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled 40600000.serial: ttyUL0 at MMIO 0x40600000 (irq = 5, base_baud = 0) is a uartlie console [ttyUL0] enabled brd: module loaded libphy: Fixed MDIO Bus: probed xilinx_emaclite 40e00000.ethernet: Device Tree Probing xilinx_emaclite 40e00000.ethernet: Failed to register mdio bus. xilinx_emaclite 40e00000.ethernet: MAC address is now 00:0a:35:00:00:00 xilinx_emaclite 40e00000.ethernet: Xilinx EmacLite at 0x40E00000 mapped to 0xF02 i2c /dev entries driver NET: Registered protocol family 17 Freeing unused kernel memory: 2296K This architecture does not have kernel memory protection. Hostname : nexys4ddr Kernel release : Linux 4.14.0-00493-gb68293ad2c93-dirty Kernel version : #120 Thu Dec 6 16:51:57 CET 2018 Please press Enter to activate this console. nexys4ddr:/# For the first I2C sensor (onboard ADT7420 sensor of the Nexys4 DDR board), we must use the /dev/i2c/0 (or /dev/i2c/i2c-0) character driver file (Major=89 minor=0). For the second I2C sensor (external TCN75A PMOD TMP3 sensor), we must use the /dev/i2c/1 (or /dev/i2c/i2c-1) character driver file (Major=89 minor=1). nexys4ddr:/# i2cdetect -y 0 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- -- -- -- 4b -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- nexys4ddr:/# i2cdetect -y 1 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- 48 -- -- -- -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- You can now use the Linux API for reading the I2C sensors... Pat.
  20. Hi, this is my first try to interact with a chip, so please bear with me if my question is dumb. I'm using Basys3 with the pmod MIC3. The ADC gives back 4 leading zeros and 12 bits of data. I can get this out of pmod. But how to interpret this data? I understand the main principle of the ADC - I get a relative value between 0 and 2^12. The pmod's reference says that this value is representative of the volume and frequency. I assume that this is a kind of composite value, like X high bits are the frequency, and the rest are for volume, or similar - but couldn't find anything about such things. I was looking at all reference documentation and sample codes I could find, but maybe I was looking at wrong places. How do I get the volume and frequency separately out of the retrieved 12 bit value? Thanks
  21. Hi guys, I've just bought a Pynq board. Could anyone help and give the main steps to follow to add a new PMOD device to the default overlay? I'd like to add the DA3 PMOD DAC that is currently missing. Many thanks!
  22. I've been working on a project and it is looking pretty nice. It is an ESP32 microcontroller, talking SPI to a PMOD AD5 that has two inputs across a 1 ohm 5W current sense resistor. At the highest ADC gains the steps are 2.5nA, but full range is about 20mA. I am currently currently running with a gain of 8, and can measure currents from a few nA through to about 300mA. Below is a graph of the startup current of another ESP32, with a spike a little after 30s when I get an image over WiFi - for now the data is just logged to a serial port at 50S/s and then I graphed in a Google Sheet. I intend to use it to test the deep-sleep performance in various modes, and to see the impact of firmware changes.
  23. YakirP

    Pmod wifi SDK problem

    Hi i'm using Vivado 2018.2 + Zedboard, my goal is to use the WiFiScan from the examples attached to Pmod WiFi folder. i have build the project in vivado section and exported it to SDK at that point i'm creating new application project, choose C++ project and select finish. i'm getting the following errors: flexible array member 'DHCPDG_T::options' not at end of 'struct DHCPMEM_T' DHCP.h ‪/proj_bsp/ps7_cortexa9_0/include/DEIPcK/utility‬ line 216 C/C++ Problem flexible array member 'DHCPDG_T::options' not at end of 'struct DHCPMEM_T' DHCP.h ‪/proj_bsp/ps7_cortexa9_0/libsrc/PmodWIFI_v1_0/src/DEIPcK/utility‬ line 216 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'class TCPSocket' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/include/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'class TCPSocket' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/libsrc/PmodWIFI_v1_0/src/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'class UDPSocket' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/include/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'class UDPSocket' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/libsrc/PmodWIFI_v1_0/src/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'struct DNSMEM_T' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/include/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'struct DNSMEM_T' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/libsrc/PmodWIFI_v1_0/src/DEIPcK/utility‬ line 145 C/C++ Problem thanks for the help
  24. I'm trying to run the PMOD SD IP core on a Nexys 4 DDR, using simple drag and drop from the board tap. I also add a microblaze and an UARTlite for communication. I wish to run the SDK (autogenerated) example of the SD PMOD IP core. I have used the same approach with the OLED and several other PMOD and it worked out fine. But with the SD card it fails, I get these critical warnings. I am surprised there is a problem at all, since I only used the PmodSD IP core, written by Digilent. See below. The file of concern below: Thanks for any help!
  25. hello, I am new to designing with pmod wifi. I want to send audio files from pc to the zybo via pmod wifi and then process it then play it via output port. is it as easy as that example showed here? Bests, Meysam Sh.