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Found 14 results

  1. Hi, I'm working on a project based on a Xilinx Ultrascale+. The final board will contain, for JTAG interface, a SMT2-NC device with a USB type-C receptacle. This board should work as "device", and so as Upstream Facing Port (UFP). At the moment, I know how to treat the CC lines (via 5.1 kOhm pull-down resistors) but I still don't understand how to connect (or how to use) the VBUS lines, because the SMT2 is powered from the 3.3V and VREF pins and not VBUS. Can I leave the VBUS lines unconnected or I should follow some specific procedure to connect them? Thanks
  2. We are using a JTAG-SMT2-NC for JTAG access through one of our daughter cards. This has worked in the past using KU115 and VU5P FPGAs paired with a Zynq. However now the VU9P the JTAG chain is unstable in Adept and Vivado hardware manager where most of the time it will not correctly scan the chain and give device IDs that do not match with devices in the chain. Is there an incompatibility with the JTAG-SMT2-NC and the VU9P FPGAs? Thanks, David
  3. Hi, I am trying to use a JTAG-SMT2 board mounted on a custom PCB and connected to my board with a cable. To do that i use a raspberry controlled remotely (the raspberry is version 3B and the OS is up to date). The programmation work fine with a windows computer and with digilent adept software. The issue is that I get a segmentation fault error when I try tu use this command : "sudo djtgcfg prog -d JtagSmt2 -i 0 -f F102-03.00.jed". Scan chain work. Does anyone had any solution for this problem ? Thanks.
  4. We have a board that uses the JTAG-SMT2 module to interface a Xilinx Zynq device. Most modules work without any issues, however one refuses to connect to the Zynq device. When first plugged into a computer (reproduced on 3 separate systems), it installs the FTDI driver for ‘USB serial converter’ properly. The misbehaving module installs an additional COM port driver and shows up as COMx. All the other working modules don’t install the COM driver. Disabling the VCP option did not make a difference. Version of the FTDI driver is 2.12 but also 2.10 and 2.8 did not seem to work. Is there any setti
  5. Hello, I was wondering if someone can tell me if the usb mtg tabs protrude out the bottom side of the module? The recommended footprint has 2 electrical keep-outs for these tabs, but no slots. The 3D step pic shows the tabs sticking out approx. 14 mils on the bottom side which would keep the module from sitting flush on the pcb. Any help would be greatly appreciated! Tim
  6. I am looking to use the JTAG-SMT2 module in a design. After reading the reference manual, I am noticing that there is no spec for power consumption. I need to know the maximum current draw of the device. Can anybody help me figure this out? Thanks!
  7. The micro-USB2 connector on my JTAG-SMT2 mounted to a ZC-706 has "come off" and I need to replace it. Can you provide the appropriate part number? Thanks, Brendon
  8. Camille

    JTAG-SMT2 questions

    Hello Does the JTAG-SMT2 Programming module work with Digilent Adept 2 ? Does Digilent Adept 2 work on Windows 7 and Windows 10 ? Does Digilent Adept 2 program Spartan-6 XC6SLX9-2CSG225I ? Looking at the Reference Manual for the JTAG-SMT2 Programming module at page 9 reveal some missing information. The Recommended PCB Land Pattern has two Electrical Keepout areas. In theses two areas there should be 2 slots for the USB connector metal tab. The 3D model and the picture of the board shows pieces of metal which will prevent the module to seat perfectly on the target PCB. We n
  9. Hi, We're designing several boards that have a mixture of XIlinx Fpgas. One such board has multiple Virtex 5's, a Kintex 7 and a Spartan 6. We want to use a JTAG-SMT2 board to both configure the Fpgas and then use Chipscope for debugging. This means that all the Fpgas would be on a single JTAG chain. Has this been done before? Should a configuration like this work? We would be driving (via USB) the JTAG-SMT2 from an embedded linux processor and use the ADEPT SDK for configuration as well as implementing USB over Ethernet so that the Xilinx debug tools could run seamlessly on
  10. Is it possible to drive the JTAG-SMT2-NC with urJTAG?
  11. Is there a way to prevent the JTAG-SMT2-NC USB pull-ups from activating (or delay activation)? When do the pullups become active? To provide more background, I am designing a system where the FPGA will power up and configure prior to USB host. The USB connection will be "device down" -- no cable present. I have concern that the USB D+ pullup present on the JTAG-SMT2-NC (by USB spec requirements) may cause power on issues for the (unpowered) USB host. Possible solutions I am considering: Prevent pullup on USB D+ until USB Host is powered up. I have a control signal to kno
  12. Dear Digilent, Upon review of your JTAG-SMT2 (Version 02 March 2015) datasheet; page-9 has an incomplete mechanical drawing. Page-9 falls to state total thickness (i.e. height or z-axis) dimensions. Only X-axis and Y-axis dimensions are provided in this datasheet. Utilization of your module in Anritsu designs require a complete mechanical drawing depicting all existing X,Y,Z-axis dimensions. Please send such information to Walter. [email protected] and/or call 408.778.2000 ext 1332 (Mon - Thrus) and 619.218.0531 (Fri - Sun). Thank You, Walter C. Washi
  13. nicol

    JTAG-SMT2 Step File

    We are looking to use the JTAG-SMT2 module in a new design. Normally we try our best to include 3D models of components in designs, so we can export a full 3D model after layout is complete (for the mechanical team). Just wondering if you guys have a 3D step file for the JTAG-SMT2 module (didn't see anything on the website). Thanks, Chris
  14. We will be using the JTAG-SMT2 module in a new design. I would like to get all the compliance documentation (RoHS, REACH, etc.) together for import into our system. Can you guys provide that? Or point me to a download location? Thanks, Chris