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Found 5 results

  1. I am using Zynq 7000 SoC developing Bare metal application image. Assuming Image_1 is already running, I am exploring how to load & execute Image_2 (with non-overlapping memory in l_script.ld). 1) I already have working Image1.mcs (FSBL + *bit + App1.elf) in QSPI Flash. 2) The Image_1 application can receive Image_2 from the Host. 3) What I want is - to load Image_2 (*elf? or *.mcs?) to respective DDR memory, and then execute it. I think I need to reuse some code from FSBL to achieve this. But I am not sure. Please advise if this direction is correct or h
  2. Hi, I am working on a project where i'm using Digilent zybo AP SoC with xilinx vivado for Hardware design and Xilinx SDK for software design. My application uses following protocol/peripherals: 1. UARTns16550 PL side (Programmable Logic) in interrupt mode. 2. GPIOs 3. Ethernet mac (lwIP stack) I started my software design using xilinx lwip perf client application project. Then i started modifying the perf client C code according to my need. My project contains Uartns16550, tcp/ip server and client program which receives real-time data. So coming to my problem, i am able
  3. Hi I am trying to run the fsbl and hello world on Zybo-z7-10, but seems like it does not work. When I tried to run the fsbl, it shows the message like this. I build this project step by step learning from a video on youtube, the hardware and software part. I post this link at the bottom. The output in terminal is supposed like this, tell me Boot mode is JTAG, but now it is not. Does anyone know why this happen? If FSBL does not run successfully, the other parts in my project won't work as well since the the clock and interrupts from PS si
  4. Hi, I'm trying to Booting My C++ Application from SD Card, I do the following actions: 1.start Vivado software. 2. New Project. 3. Select Zybo from Board lists. 4. Create Block Design. 5. Add Ip 6. Add Zynq7 Processing System. 7. Run Block Automation 8. Route M_AXI_GP0_ACLK pin to FCLK_CLK0 pin. 9. Validate Design (no error). 10. create wrapper 11. Generate Bit stream 12. Export> Export hardware (include bitstream). 13.launch SDK. 14. Create new application (c++). 15. Write my code #include<stdio.
  5. Recently I had to make a standalone Zynq project that had multiple .ELF files all residing on an SD card. The board had to somehow know, while being powered off, which .ELF file to boot from. So how to do this? The answer is in the FSBL file. Currently, in Vivado's 2014.2 SDK, the FSBL can handle multiple "partitions" (that's how any Second Stage BootLoader is called, in our case the .ELF files) by executing the first one, when done returning to the FSBL that handoffs control to the second one and so on. But there is another way with the so called hooks: FsblHookBeforeBitstreamDload, FsblHoo