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Found 11 results

  1. greg751


    HI everybody, Did anybody suceed to program CMOD S6 thanks to the JTAG header ? I'm trying desperatly to initiate the JTAG chain without any success ! With I used the USB connexion, it works perfectly. I wanted to try the platform cable USB from Xilinx to configure the FPGA like shown on the following picture : I got the following error : There is something that "puzzles" me in the CMOD S6's schematic... I put the parts of the schematic concerned by my interrogations in the attached file (PDF). I noticed that there are physical links between J4 header, IC3A (Atmel) and IC5A (FPGA) for the following signals : TDI-FPGA TDO-FPGA TCK BUT regarding the TMS signal, there is a physical connexion only between the IC3A (Atmel) and the IC5A (FPGA). On the J4 header, the signal that should be TMS, is called ISP-Reset. This signal is kept at 3.3V thanks a pull-up resistor and goes into the IC3D. I used an oscilloscope to observe the TMS signal (during the Initalization JTAG chain phase) on IC5A (FPGA) in two different cases : 1°) by using the on board USB => the TMS signal changed 2°) by using the paltform Cable USB 2 => the ISP-reset signal changed BUT the TMS signal did not change... In both the cases TDI-FPGA, TDO-FPGA and TCK changed This could (maybe) explain why it is not possible to configure the FPGA directly by the JTAG header... Does anyone have an explanation about this issue ? Thanks a lot, Kind regards, Greg. cmods6_Partial_Sch.pdf
  2. Hello everyone, my name is Julian. I've been programming the FPGA on the CMOD S6 for a few months for a project I'm working on, I need to communicate to a device trough an interface similar to an SPI but the data out line has to change it's value on both edges of clock (5 MHz clock frequency). The problem is that everything is working and I could accomplish communication with the device, however I'ts not understanding the commands I'm sending to it, I think this because no matter what command I send it always responds to me with a default response word, same response if you only send a burst of 8 clock pulses with data line asserted low. According to the datasheet of the device there should be an input setup time and hold time of 10 ns (hence the data out line should change its value 10 ns before the clock), this is the only parameter I'm not respecting and you can see it in the image attached measured with an oscilloscope, where the red signal is the 5 MHz clock and the yellow signal is the output data line. The burst of 8 clock pulses you can see in the image is the main clock used by the fpga but assigned to that output in the correct timing. The yellow signal should change its value a bit before the change of the clock. So what I need to do is, instead of sending an exact copy of eight clock pulses, delay the clock out line 10 ns from the main clock. Is that possible using constraints for setup time or some other constraint? I've tried OFFSET OUT but nothing changed. I hope to have written my query clear enough to be understood. I'll be waiting for your replies. Regards. Julián Strada. Test.bmp
  3. Can the cmod s6 be programmed using the USB connector and impact tools when the cmod s6 module is plugged into my unpowered breadboard? That is, are the user output pins placed in high impedance when powered from the USB cable and being programmed? Or, should my breadboard be powered when programming using the USB cable? That is, can the cmod s6 module be programmed without removing it from my breadboard circuit? Thanks.
  4. IHATA

    CMOD S6

    I bought CMOD S6 . then I downloaded CmodS6_demo file from . but I have never used VHDL. Does DIGILENT provide demo file written in Verilog?
  5. Hello, I would like to by-pass digital input clocks ~20MHz on CmodS6 FPGA board to the computer through the USB interface. The max rate I could get is 150Kbps using DeppDemo. Is there a way to speed up data transfer? Is there any other Digilent devices which might support such high data rate (smaller form factor if possible)? here is my command time ./DeppDemo -s 12 -d CmodS6 -f test.bin -c 155000 Stream from register complete! real 0m0.997s user 0m0.060s sys 0m0.056s Any advice is much appreciated
  6. Hello, I'm from PLTW and have seen several (at least 4) CMOD S6 devices fail this year in my class. I've used over 20 in my classes for the past 2 years and this is the first year that I've seen so many fail. The red led that normally lights when plugged into the USB is out. In probing the device, I measure about 4.5V at the input of IC1 (the 3.3V regulator) but only about .5V at the output (on the VCC3V3 line). Are there any known issues with these boards as it relates to blowing the regulators? Or any other common failures that is occurring where the board is operating fine but then the power led (red led) stops lighting and the device stops working? Is there any way to get these repaired/replaced? Thank you
  7. Greetings! I would like to share a CMod S6 System on a Chip (S6 SoC) design. This project is designed to demonstrate how capable a CMod-S6 can be, while also demonstrating a home-grown soft-core CPU: the Zip CPU. In particular, the S6 SoC project demonstrates: The ZipCPU (GCC and binutils support are provided elsewhere via the Zip CPU project) Several PMod's: PmodUSBUART, PmodAMP2, PmodKYPD, and the PmodCLS--all running at the same time even! A small multitasking home-grown operating system, the ZipOS. In the spirit of Free and Open Source, all of the source code for the project is available on OpenCores. Yours, Dan
  8. RTC

    Cmod S6 toolchain?

    Hello - looks like the FPGA Cmod series do not come with a Vivado license like Arty does. From Xilinix info, should be possible to use their webpack version for the A7 but that product does not support Spartan. Any ideas on how to support the Spartan chip? Thanks, - Rick
  9. This problem is strange. I've been using the Coolrunner II for over 20 projects. I saw the Cmod S6 Dip format and thought I would give it a try. I started with a simple program and got an external LED to flash at 1 Hz on Pin 1. The demo that comes with it also flashes the on board Led at 1 Hz. I simply just duplicated that. So good so far. Now here's the strange thing, When I remove the USB connection and then reconnect it or add the 5 Vdc power from a separate power supply, the on board LED flashes but the external one does not. If you measure Pin 1 you will see a hard voltage 3.3 vdc when open and 1.3 vdc when I have the external LED connected. It is no longer changing states. If I reprogram it without changing enything, it starts to flash again. I've tried a number of experiments from another CmodS6, different pins and rebuilding the project from scratch with the same results. Has anyone else seen this or tried to run there's stand alone. Thanks
  10. I am looking for outline dimensions for the Cmod S6. Not in the users guide on on the web page. They should be on the website. PDF, PNG, anything would be fine. I assume that this board fits in a 48 pin DIP socket which has holes on 0.1inch centers and 0.6inch spacing. Is this correct? Would also like to know if the USB port is on the centerline of the board or offset.
  11. Hi I am using Xilinx Platform USB cable II for programming CMOD S6 using iMpact Software. The connection picture is attached alongwith(connections.jpg) . But when I try to do Boundary scanning , it is showing some error .. also attached alongwith (iMpact error.jpg) Is there any specific document from where I can follow steps to program the CMOD S6 via JTAG or can you please provide some tips/instruction? Regards Hari