Hello
This is the second project for me in FPGA for fun.
I want to connect external board with 7 seg as a counter, so I put this Verilog code with this XDC file but the output is something error , could you please figure it out?
I use common Anode display
PMOD XADC
pin 1 ---> pin 12 (7 Seg)
pin 2 ----> Pin 9
pin 3 ---> Pin 8
pin 4 -----> pin 6
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PMOD JB
pin 1 ---> pin 11
pin 2----> pin 7
pin 3-----> pin 4
pin 4 ----> pin 2
pin 5 ----> pin 1
pin 6 ---> pin 10