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Hi, A small improvement for the SPI interpreter? We now only have a 3 wire possibility but it would be nice if we have a 4 wire too as you can see in my example where I added 1 separate channel DIO 3, the disadvantage is that I must interpret the values (like SPI MISO) of the MOSI channel by myself. Here is an example from a competitive logic analyzer; And can we have ASCII in the format too? Thanks in advance, Hans