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  1. Hello, I am trying to implement LVDS (1.2V nominal) using the Digilent Arty-S7 25 board. The schematic shows that the JA and JB Pmod connectors have 4 diff. pairs per connector. However, it looks like VCCO (the power supply for this I/O bank) is tied to 3.3V. To my knowledge, there is no differential I/O protocol that uses 3.3V. Does this mean that JA and JB can't be used for differential pairs? (Wouldn't that negate the point of running the differential pairs in the first place?) Or do the pins just output the correct voltage when you implement the LVDS protocol? Please help! Thank you