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  1. I'm getting these errors when trying to run synthesis a demo project from the arty resource page. On that page I tired doing the XADC. i did get it to generate the .tlc file stuff to make the project I did download the board files for the arty and placed them in the boards_files directory. but maybe it's not implemented correctly or im missing something. Some xilinx forums said to click on the "open block design" to fix this but mine is grayed out and I can't select it. Most tutorials online show the old Vivado UI the 2017.1 seems to be slightly different. mostly likely due to the missing xadc_wiz_0 module but it shows up on the source list. Or maybe its a compatibility issue between Vivado 2016.4 and 2017.4 I'll wait for a response before trying something else.