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Found 106 results

  1. rcjhy8

    Zybo External LED Control

    Hi all, New to the FPGA world as I was tasked a project to help familiarize myself with the programming and function of how FPGAs work. As you can all infer, I am in need of some help on a specific project that I am doing. I am using a ZYBO Zynq 7000 development board, and Vivado 2019.1. What I am trying to do is control an external sensor, or LED through some user interface. I have seen a lot of tutorials that use the on-board LEDs, and if you press a button, it displays that value in binary in a command terminal. My task that I was to do is be able to turn on and off an external LED connected to the ZYBO through the command terminal. It seems I can connect a simple circuit with a LED and a resistor to the PMOD pins that are power and ground. What the command terminal would let me do is then essentially cut power to that pin, therefore turning the LED off. Please let me know if this is probable, and/or how I should task to complete it. Thanks, Russell
  2. sgandhi

    Webserver using Zybo Z7

    Hello, I have been successful in running the lwIP echo server on the Zybo Z7 board. However, I want to develop a web server on Zynq. I have gone through the lwIP documentation. However, in the discussion of this topic, I was successful in reading the .bin file from the SD card. Now I want to set up a web server on Zynq so I can command the server to read the .bin file from SD card and store it in the DDR. How do I start working on the web server. I have been searching a lot for the tutorial or anything that could make me understand in a simpler way but I failed to find any.! I also tried understanding the echo server C code in sdk however, after a point it seems too confusing to me. I could even think of modifying the echo server C code to develop a web server with some help, may be. The documentation of lwIP is confusing to me at this point.... Thanks, Shyama.
  3. Hi. I'm beginner of zynq. When I was designing with hdl on spartan6, I drew a timing diagram and designed a state machine to make the desired signal from the desired state. So, I've already designed a state machine. However, I am not sure because I am going to use this state machine in combination with the aurora ip and gpio ip of xilinx. I want to design to interact with gpio1 in some states and gpio2 in others state. (i mean that read value from gpio to PL side in specific state.) For do that, do i design a state machine in custom axi ip? Can i control it only with hdl? Or do I have to control it with C code in SDK? I'm sorry that the question is not clear because I don't know well. Thanks.
  4. birca123

    ZYBO Image Processing

    Hello, is there any image processing library that can be used for standalone applications on ZYBO? Thanks, Toni
  5. Hi, I am working on a project where i'm using Digilent zybo AP SoC with xilinx vivado for Hardware design and Xilinx SDK for software design. My application uses following protocol/peripherals: 1. UARTns16550 PL side (Programmable Logic) in interrupt mode. 2. GPIOs 3. Ethernet mac (lwIP stack) I started my software design using xilinx lwip perf client application project. Then i started modifying the perf client C code according to my need. My project contains Uartns16550, tcp/ip server and client program which receives real-time data. So coming to my problem, i am able to run my application from xilinx sdk GDB and system debugger. But, when i dump my code in QSPI flash and try to boot, the zybo is not booting up. I also tried loading different application project like tcp perf server, perf client. By doing this the processor boots up properly through QSPI flash. I followed the steps provided by Digilent for programming the flash and i also ensured that the jumpers are in the right place where it has to be. I believe that there's a problem with my program since i have started modifying the tcp perf client code for my project. I am not getting a clue where my code is going wrong. Operating System : Windows 10 Software : Xilinx vivado 2018.3/SDK 2018.3 Any inputs related to this will be appreciated. Thanks & Regards Ajeeth kumar
  6. Hi! In previous topic i have asked about first start with Zynq core (i have Ettus E310 board) Now it is time for connecting ADC that is on board AD9361 . I want to get some signal and receive it via ADC - i do not understand how to connect ADC (how to edit Zynq for getting data via RF board connector (via LVDS??) https://files.ettus.com/schematics/e310/e310.pdf) I have read manual (p.34) about that ADC https://www.analog.com/media/en/technical-documentation/data-sheets/AD9361.pdf I hope, somebody help me to edit blocks or code in Vivado and get digitalized data from ADC. Best regards.
  7. I want to use GNU RADIO to design an RF signal receiving circuit. For this I plan to use an FPGA card in the baseband section of the circuit (to handle the decimation and, if possible, to convert analogue to digital signal). My doubt lies in knowing if it is possible to communicate the FPGA card to the GNU RADIO application directly or if necessary from an external program. At this point it should be noted that I work in windows 10. I'm quite new on the subject of FPGA and GNU RADIO. I would really be grateful if you help me with this problem. The card is a Xilinx Zynq-7000 Developmet Board, the Z-7010, its features are best seen on the next page https://reference.digilentinc.com/reference/programmable-logic/zybo/reference-manual Suggestions for design changes are welcome. In advance thanks for the help.
  8. Any & all help is appreciated with this thread. I am 100% new rookie to FPGA. I purchased the Digilent Zybo Z7: Zynq-7000 ARM/FPGA SoC Development Board (Zybo Z7-20 with SDSoC Voucher) My intentions are to crypto currency mine a new FPGA algo called Odocrypt created by the blockchain group Digibyte DGB. Here are a couple links to the info. https://www.dgbwiki.com/index.php?title=FPGA_mining https://www.coinfoundry.org/pool/dgb5 DigiByteCoin Github Odocrypt Mining Software https://github.com/DigiByte-Core/odo-miner It will change every 10 days. Its supposed to, to make it more ASIC resistant. I thought this may make a nice marketing tool also that is profitable & I'll gladly promote if someone can tell me how to set it up! Any input, insight or suggestions how to setup the Xilinx software for this particular FPGA to mine that Odocrypt algo on that mining pool... would be greatly appreciated! TYIA
  9. Kris Persyn

    Stuck in SDK

    Hi, I'm stuck in SDK. I want to control my hardware design through the use of IP cores, but can't seem to get my software to run properly. I cant even xil_printf nor light some LEDs on my Zybo z20. Any suggestions? head.h helloworld.c
  10. Hi folks, I hope all is well with you. I am a newbie to zynq AP SoC. I started working with Digilent Zybo board, lwip ethernet echo server example. Problems facing. 1. Auto Negotiation failure if i set the link speed to auto in bsp. If i set link speed to 1000Mbps the program says that the ethernet link is down. 2. How to modify the echo server program where i can send and receive data to a specific ip address with specific port number as Server and also as client. I am using a Xilinx SDK version 2018.3 Operating system: Windows 10 Happy to hear a best possible solution from you folks. Thanks in advance. Regards Ajeeth kumar
  11. I'm trying to boot a Zedboard using a SD card, and it fails. The Power good LED is on, but the 'Done' light remains off. I tried 4 different SD cards (all UHS-I), but later read that UHS-I cards aren't supported, so I'm using a non-UHS card and it still fails to boot. MIO6:2 headers are '01100', which is the SD card boot configuration. I've also shorted JP6 on the board. VADJ is at 1.8V The board boots successfully from QSPI - the blue LED and 4 red LEDs come on. I formatted the SD cards using both: the official SD Card Formatter & Windows 10's inbuilt 'Format' Then I copied the 5 files from the Out-of-box Demo on Digilent's website: https://reference.digilentinc.com/reference/programmable-logic/zedboard/start?redirect=1 I've also tried the 'zedboard_oob_design' from the Avnet forums, and the Analog Devices images from their website - and the board still fails to boot. I've tried the SD cards on another Zedboard, and it fails to boot on that one as well. The UART doesn't print anything (115200, 8N1) either. Is there anything I'm forgetting to check? Does the SD card require a specific format, sector size, partitions etc?
  12. hi Now i'm using ZYBO. I tried to send data from ZYBO to PC by ethernet communication. I already succeed to check lwip echo server example. (https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-getting-started-with-zynq-server/start). what i want to do is sending XADC data from PS to pc by ethernet. So, can i do this by modifying echo server code? Is there any example about this? or other method? thanks.
  13. Hello, I am trying to develop a simple verilog code on Arty-Z7-10 that writes to the SD card on the PL side, without having to use SDK software. To do so, I believe I need to setup my SD card pins as EMIO in the ZYNQ and modify the constraint file to uses correct pin mapping. However, I wonder if anyone has done such type of coding before and is able to provide me with more detailed information. I found this tutorial which has tried to do same thing with SPI, but it was not very detailed. https://forums.xilinx.com/t5/Xcell-Daily-Blog-Archived/Adam-Taylor-s-MicroZed-Chronicles-Part193-The-Zynq-SoC-s-EMIO/ba-p/764971 I also found such SD card controller for Nexys4 board, while it seems a bit challenging to get it to work with Arty Z7 board due to different pin mappings. https://web.mit.edu/6.111/www/f2015/tools/sd_controller.v Any help is appreciated. Thanks, Mahdi
  14. hello everyone, I need help in hardware requirement for the xmcdma_interrupt_example.c test. I tried below example design as in program it is for 8 channels and the mm2s port is connected to s2mm port. At the output, it is showing Entering main( ).but not going further in the code. please help me with this. thanks in advance, Regards amit
  15. Hello Everyone, I am trying to get Arty Z7-20 boot from flash with encryption enabled. I am following Xilinx 'XAPP1319' to program AES key to BBRAM. I created MCS boot image with 'fsbl' and 'program_aes_key_bbram' application program(xilskey 6.3 example 'xilskey_bbram_example' for Zynq not ZynqMP) for qspi flash as described in Xilinx 'XAPP1319'. However on booting from SPI flash, BBRAM example print exit message 'BBRAM Example failed' on serial console. On debugging with JTAG, I found it fails while programming BBRAM, in function I have the jumper set to QSPI while booting from flash. Attached is serial console output. Any idea why I am having this issue? bbram_out.txt
  16. tiago0297

    Axi DMA always busy

    Hi, I'm doing a project that uses AXI DMA. I already done my Ip Core, my Block Design e and my SDK code. The problem is that when my program reaches while(XAxiDma_Busy(&axiDma, XAXIDMA_DMA_TO_DEVICE)) it gets stuck. I'm using a Zedboard and Vivado 2017.4. I did a search, found out that it's a very popular problem, but I had no success solving it, so I'm posting here trying to get more help. I'm attaching my sources. Thank you srcs.zip
  17. Hi I am trying to run the fsbl and hello world on Zybo-z7-10, but seems like it does not work. When I tried to run the fsbl, it shows the message like this. I build this project step by step learning from a video on youtube, the hardware and software part. I post this link at the bottom. The output in terminal is supposed like this, tell me Boot mode is JTAG, but now it is not. Does anyone know why this happen? If FSBL does not run successfully, the other parts in my project won't work as well since the the clock and interrupts from PS side are not activated. For example, in EnableSampleGenerator, I assign 32 and 1 to GPIO, but when I read from it, they are still 0. Also after I start first DMA transmission, when it finishes, there should be an interrupt, and in the interrupt I start another DMA transmission. Now seems like the interrupt never happens, so I seriously doubt the FSBL does not run properly. Thanks a lot in int main()
  18. Greetings all, Usually, the default uart for xilinx sdk is ps7_uart1. But I want to use axi uartlite block as my stdin and stdout since I want to redirect the xil_printf statements to uartlite rx pin. Is that possible to change the stdin and stdout to axi uartlite and still view the printf statements in the terminal output???
  19. Hello Everyone, I am trying to get my Arty Z7-20 (XC7Z020) to boot from flash with encryption enabled. If I do not enable encryption, I am able to get this to work. I am using the tool "Create Boot Image" in the Xilinx SDK. I open the encryption tab and check the box labeled "Use Encryption" and provide the "Part name." The Part name I use is "XC7Z020." I have also tried "XC7Z020CLG400", which I found when using that board in a Vivado project. The Boot Image is created just fine, and I am able to program the flash. However, when I power on the FPGA, the done light does not come on and it seems to get stuck booting. I do have the jumper set to QSPI. Any idea why I am having this issue? Thanks, Christian
  20. Hello, I am using Zed board 7000. I want to do Image Processing or basic computation in Zed board on PL side using FPGA. I was a bit confused to start either with a Linux image(PetaLinux or Xillinux) or directly through the Vivado software. Is it possible to do any computation or Image Processing on the PL side using ARM processor only to interface the peripherals(I don't want the computation to be done on the ARM processor). Kindly provide any reference link or tutorial which can address my queries. Thanks in advance. ---Nikith--
  21. Hi all, i want to interface RGB(24 -bit) display with zynq 7000. How can I do this. I don't have any idea about how to do this. Can anyone help me .
  22. I am working on the Zybo Z7-10 board. My goal is to determine the position and orientation of the FPGA in space at any given instance. For that, I am using a PmodACL2 and PmodGYRO. Now, I need to integrate the accelerations and angular velocities. How do I measure the time at which the Pmods are giving me the data?
  23. Hello guys, I am using Zybo Z7-10 and want to use a timer which polls e.g. every 100ms by starting a task in freertos. What is the best way to implement such timer? Do I need to use XScu_Timer or Global Timer or Watchdog Timer Thanks, Mirco
  24. Hey evryone ! i am using zybo 7010 in ubunto 16.04 I generate a BOOT.BIN and an image.ub, I put the two files in the SD card but it does not boot! in vivado i activate UART0 and UART1. jumper is good. I enclose the two files system-user.dtsi and system-conf.dtsi. my serial terminal is /dev/ttyUSB1. please helpe ! system-user.dtsi system-conf.dtsi
  25. Hi, We have bought two JTAG-HS3 debuggers. One of them works perfectly, but the other one keeps returning: "1 whole scan chain (device configuration stabilizing)" or "1 whole scan chain (device configuration unstable)" when using the "targets" command. Any idea what could be the problem? Best regards Lars