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Found 75 results

  1. Hi! I've got an ARTY board and I find the USB connection incredible useful, as it allows to use only one connection to program the FPGA through JTAG while simultaneously act as an USB to serial converter. So, I also bought a JTAG-SMT2-NC to fit into a custom board and it's a very convenient way to program my FPGA, but... is it possible for it to act as the module that fits on the ARTY, and make it be recognized by the PC as a USB-serial converter, using its GPIO pins as the interface with the FPGA, as the ARTY does? That would be really great, but I think it's not possible, is it?
  2. Hi, I'm using Deca Max10board which has 46 pin BBB expansion header. As my board doesn't have an USB to UART module so I got a PMOD USB to UART for data transfer. Can I directly connect the Pmod module to the BBB expansion header or do I need some other connector to connect the pmod module to BBB expansion header ? Can anyone help me with this ? Thanks, Swarnava Pramanik
  3. I'm trying to program my Zybo board. I have tried using Vivado 2014.4 under Centos 5.9 and Vivado Webpack 2016.2 on Ubuntu 14.04.2. I am using the Zybo walwart for power and both linux's are VM's(VMWARE Fusion) running on OS X El Capitan With Jumper J5 assigned to JTAG when the board is connected to linux both /dev/ttyUSB0 and /dev/ttyUSB1 show up when the board is connected via the USB micro A/B cable. When I use the SDK to program the FPGA it shows the following error message Program FPGA failed. Reason: Connection to board failed. I was using this board about a year ago and was able to load linux into the board at that time. Currently if I boot from the QSPI I see messages being sent to /dev/ttyUSB1, Currently I no longer have the USB cable that was supplied by digilent (so I'm not sure if there is anything special about the cable) so I have tried two different cables with the same results. Any suggestions on how I can program the Zybo board? Thanks Mike.
  4. Hey all , I am taking a continuous 16 bit serial input from an AFE to nexys 4 ddr board and storing it . Now I have to take this data to pc using usb . I have been searching for this for a long time now (2 weeks to be exact ) but could not find any simple solution . I am using ISE design suite 14.7 VHDL for programming. This is my first fpga project, so please bear my incompetence. Thank you
  5. We have some JTAG HS2 dongles for talking SPI to our devices. We've recently started playing with devices that have dual I/O SPI modes for increasing the data bandwidth without increasing the pin count. Can the JTAG HS2 handle these SPI modes? We also roll our own software so having an Adept lib that supports this would be real nice. Anybody try this before?
  6. Is there documentation on how to write a controller to read and write data to a USB mass storage device formatted with FAT 32 file system on the Genesys 2 board? If not what specifications, datasheets etc do I need to study in order to develop such a controller.
  7. Hi, Is it possible to program the JTAG-USB cable directly via the FTDI D2XX library, bypassing the Adept DJTG library? It seems to be possible to identify the device after a call to FT_SetVIDPID, but FT_OpenEx always seems to return FT_DEVICE_NOT_OPENED. Is another step needed first? Or is the source code for the Adept SDK libs available? Thanks, Jon
  8. Hi everyone! There is my problem… I intervene to the communication of a usb device with the host. I use a commercial chip for this purpose. (Here is the link if anyone is interested to it… ) I take the D+ and D- signals and I need to get them to zedboard in bits form. I just want to get the data, send them to the zedboard and don’t response back. I thought that I could use a ulpi chip. What do you think? Does anyone ever did something like that? Can you provide some info? Maybe suggest a chip that could help me… Any ideas are welcome!
  9. I am attempting to develop a routine based on two example projects. Based on a Wire I2C master read and Custom USB HID native operation. I have decided to use the newer Arduino tool kit and have attempted to compile these examples with MPIDE, UECIDE without any luck. It appears as if I can get the Wire to compile, don't know if it works? When I attempt to compile CustomHID.pde I see issues that I don't understand, below. Arduino: 1.6.8 (Windows 7), Board: "PIC32 Pinguino" C:\Users\Ken\AppData\Local\Temp\build2ee4b577e1509cd794bdb52531edd480.tmp/core\core.a(HardwareSerial_usb.c.o): In function `__vector_dispatch_45': c:/users/ken/appdata/local/arduino15/packages/chipkit/hardware/pic32/1.0.1/cores/pic32/hardwareserial_usb.c:(.vector_45+0x0): multiple definition of `__vector_dispatch_45' libraries\chipKITUSBDevice\utility\usb_device.c.o:c:/users/ken/documents/arduino/libraries/chipkitusbdevice/utility/usb_device.c:(.vector_45+0x0): first defined here c:\users\ken\appdata\local\arduino15\packages\chipkit\tools\pic32-tools\4.8.3-pic32gcc\bin\bin\gcc\pic32mx\4.8.3\..\..\..\..\bin/pic32-ld.exe: function at exception vector 45 too large c:\users\ken\appdata\local\arduino15\packages\chipkit\tools\pic32-tools\4.8.3-pic32gcc\bin\bin\gcc\pic32mx\4.8.3\..\..\..\..\bin/pic32-ld.exe: Link terminated due to previous error(s). collect2.exe: error: ld returned 255 exit status exit status 255 Error compiling for board PIC32 Pinguino. This report would have more information with "Show verbose output during compilation" option enabled in File -> Preferences. Here is a compile with a MX4cK board. Arduino: 1.6.8 (Windows 7), Board: "Cerebot MX4cK" Build options changed, rebuilding all libraries\chipKITUSBDevice\utility\usb_device.c.o: In function `USBDeviceAttach': c:/users/ken/documents/arduino/libraries/chipkitusbdevice/utility/usb_device.c:2866: undefined reference to `INTEnableSystemMultiVectoredInt' c:/users/ken/documents/arduino/libraries/chipkitusbdevice/utility/usb_device.c:2866: undefined reference to `INTEnableInterrupts' collect2.exe: error: ld returned 255 exit status exit status 255 Error compiling for board Cerebot MX4cK. This report would have more information with "Show verbose output during compilation" option enabled in File -> Preferences. Where am I going wrong? Ken
  10. How to setup diligent usb cable for Xilinx Spartan-3 starter kit on CentOS 6? I have already installed ISE WebPack, digilent.adept.runtime, digilent.adept.utilities, libCseDigilent, fxload, and some other packages. lsusb shows: [lukasz@localhost home]$ lsusb Bus 001 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub Bus 001 Device 006: ID 03fd:000d Xilinx, Inc. but djtgcfg shows nothing: sudo djtgcfg enum No devices found iMPACT log: Welcome to iMPACT iMPACT Version: 14.7 Project: /home/lukasz/VHDL/QLIW//auto_project.ipf created. // *** BATCH CMD : setMode -bs // *** BATCH CMD : setMode -bs // *** BATCH CMD : setMode -bs // *** BATCH CMD : setMode -bs GUI --- Auto connect to cable... // *** BATCH CMD : setCable -port auto INFO:iMPACT - Digilent Plugin: Plugin Version: 2.4.4 INFO:iMPACT - Digilent Plugin: no JTAG device was found. AutoDetecting cable. Please wait. *** WARNING ***: When port is set to auto detect mode, cable speed is set to default 6 MHz regardless of explicit arguments supplied for setting the baud rates PROGRESS_START - Starting Operation. If you are using the Platform Cable USB, please refer to the USB Cable Installation Guide (UG344) to install the libusb package. Connecting to cable (Usb Port - USB21). Checking cable driver. File version of /opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/xusbdfwu.hex = 1030. File version of /etc/hotplug/usb/xusbdfwu.fw/xusbdfwu.hex = 1030. WinDriver v10.31 Jungo (c) 1997 - 2011 Build Date: May 24 2011 x86_64 64bit 18:13:19. Cable connection failed. Connecting to cable (Parallel Port - parport0). WinDriver v10.31 Jungo (c) 1997 - 2011 Build Date: May 24 2011 x86_64 64bit 18:13:19. Cable connection failed. Connecting to cable (Parallel Port - parport1). WinDriver v10.31 Jungo (c) 1997 - 2011 Build Date: May 24 2011 x86_64 64bit 18:13:19. Cable connection failed. Connecting to cable (Parallel Port - parport2). WinDriver v10.31 Jungo (c) 1997 - 2011 Build Date: May 24 2011 x86_64 64bit 18:13:19. Cable connection failed. Connecting to cable (Parallel Port - parport3). WinDriver v10.31 Jungo (c) 1997 - 2011 Build Date: May 24 2011 x86_64 64bit 18:13:19. Cable connection failed. PROGRESS_END - End Operation. Elapsed time = 2 sec. Cable autodetection failed. WARNING:iMPACT:923 - Can not find cable, check cable setup !
  11. I purchased the Electronics Explorer a couple months ago and when I tried to use it for the first time last week, I kept getting an error that "There was a power surge on the USB port. Unknown USB device needs more power than the port can supply. " I had the 12 volt power supply plugged in, so I am not sure what I need to do. I did notice that when I first tried to plug the USB plug into the board, it was very difficult to plug in, like something was blocking it. After a second try, it seemed to go in okay, but then I started getting the above error. Please let me know what my options are for getting this fixed. Thank you, David Canfield
  12. Has anybody used one of the USB over CAT5/6 extenders with a Digilent JTAG programming cable? Something like this: We're trying to program devices that are either in different rooms or across the room from the programming computer. The main concern is that USB may not be able to supply enough power for both adapters and the JTAG device. Thanks, Will
  13. hi! Does anyone know if I can use my usb to uart pmod, which is connected to a zedboard, to communicate with a device as a host? I want the zedboard to be the host of the communication and send specific data packets to the attached device. I test the pmod with a usb analyzer and see that it works as a device(slave). Can I make it a host(master) or it sends by default specific data header? And if yes how this can be ? I’m really new on embedded design and I really need some help… Thanks in advance!
  14. Jensen

    Genesys 2 FT2232H

    Hello, I have a Digilentinc Genesys 2 board, my project needs to communicate between a PC and the FPGA. Because the data needs to travel at high speed I use the FT2232H-chip. I already can send data from the pc to the FPGA. But sending data from the FPGA to the PC isn't possible. My code(Verilog and Labview) works with a custom board with the same FT2232H-chip but not with the Genesys2. The problem is that the USB_TXEN doesn't go LOW. Is it possible that I need to set the USB-jumper(s) on another position? Does anybody know another source of this problem? With friendly regards, Jensen
  15. Hi all, I want to know the detail dimension of JTAG-USB cable connector header pin. I know this is very common header pin connector, but I want to understand its pin length and width to ensure the connection. Does anyone know about this? Thank you!
  16. I was looking at the PmodUSBUART, PmodRS232, PmodRS232X and the Digilent Pmod Interface specification and need some clarifications The PmodUSBUART and PmodRS232X uses the Type 4 Pinout and the PmodRS232 uses the Type 3 Pinout. The table pinout on the Pmod Interface Specification is for the Host for Type 3 and Type 4 UARTs. Can someone verify that my assumptions are ok?
  17. I lost the USB cable that came with my Analog Discovery. Can I use any standard USB A to micro B cable ? If so, what cable length is recommended ?Thank You
  18. The HDMI2USB project aims develops affordable open hardware options to record and stream HD videos (from HDMI & DisplayPort sources) for conferences, meetings and user groups. Our current focus is on around custom gateware running on FPGA hardware, our gateware if fully open and can be found on github. The gateware allows for both full matrix functionality and capture via either USB or Ethernet. A control terminal is also available giving the computer complete management of all functionality. We have been using the Digilent Atlys as a prototyping platform and are investigating also supporting the Digilent Nexys Video. We are also developing our own hardware the Numato Opsis. As an open source project, we'd love help continuing to develop new features and functionality. We are actively seeking assistance: For video recording individuals+teams: Be an early adopter; get a board, start using it, report back to us with feedbackFor software/FPGA developers: Get involved in contributing code both to the capture software + FPGA stackOur aim is this becomes the defacto, incredibly affordable and easy to use video recording hardware for conferences, meetings and user groups worldwide. Find out more about HDMI2USB and why we’re doing this in ABOUT + FAQ
  19. From the album: - Firmware for capturing HDMI and DisplayPort via USB and Ethernet

    __ _____ __ _______ ___ __ _________ / // / _ \/ |/ / _/ |_ | / / / / __/ _ ) / _ / // / /|_/ // / / __/ / /_/ /\ \/ _ | /_//_/____/_/ /_/___/ /____/ \____/___/____/ alternative Copyright 2015 / EnjoyDigital Alternative HDMI2USB gateware and firmware based on Migen/MiSoC [> Supported Boards ------------------ This firmware is supported on the following to boards; * Digilent Atlys - The original board used for HDMI2USB prototyping. Use `BOARD=atlys` with this board. * Numato Opsis The first production board made in conjunction with project. Use `BOARD=opsis` with this board.

    © MIT

  20. I currently have an Atmel ATMEGA644A microcontroller on a custom made PCB, and I need to figure out how to program it. I didn't know if the cable sold ( was enough to program the board on its own, or if I needed a USB to JTAG adapter as well. Could someone please shed some light on this?
  21. Hello, I am fairly new to linux and I am trying to program a cerebot nano. I have the JTAG-USB cable with SPI, rev. b. I have downloaded wine and the AVR programmer but I don't see the device when I enumerate in the AVR programmer. If I use djtgcfg enum, from the terminal: chris@chris-T510 ~ $ djtgcfg enum Found 2 device(s) Device: DCabUsb Product Name: DCabUsb1 V2.0 User Name: DCabUsb Serial Number: 50003C003874 I did install the usb drivers that came with the AVR programmer, using wine. Any ideas?
  22. zygot

    Adept SDK

    The documentation for using the SDK software libraries and sample HDL is, let's go with sparse to be kind. I've been using it for a few years but my last project has resulted in unexpected behaviour. I have a design that uses both dpmiref and stmctrl sample HDL components and want to access both in my PC application. I don't get any errors, but when I execute DeppDisable() and then DstmEnable() I sometimes have the contents of epp registers lost. Then, when I try and do a DstmIOEX() transfer UsbStmen never gets asserted and the application hangs until the library code times out. I've done this in the past with success but just am not finding what's different in the current project that is causing me grief. Does Digilent have any useful examples (HDL and C code) using both synchronous an asynchronous USB data transfers in one design? Also, can I really do overlapped synchronous IO? The API suggests yes, the documentation and my experimentation no.
  23. I was wondering if anyone could guide me in the right direction for troubleshooting a USB peripheral connection with the Zybo board running embedded Digilent Linux. My boot is as follows, which shows the USB root device (not OTG - the title is a mistake) appears to be loaded properly but no USB devices show: U-Boot 2014.01-00005-gc29bed9 (Feb 01 2015 - 22:39:09) I2C: ready Memory: ECC disabled DRAM: 512 MiB MMC: zynq_sdhci: 0 SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: Gem.e000b000 Hit any key to stop autoboot: 0 Device: zynq_sdhci Manufacturer ID: 27 OEM: 5048 Name: SD04G Tran Speed: 50000000 Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 3.7 GiB Bus Width: 4-bit reading uEnv.txt ** Unable to read file uEnv.txt ** Copying Linux from SD to RAM... reading uImage 3819360 bytes read in 340 ms (10.7 MiB/s) reading devicetree.dtb 7374 bytes read in 18 ms (399.4 KiB/s) reading uramdisk.image.gz 3694172 bytes read in 329 ms (10.7 MiB/s) ## Booting kernel from Legacy Image at 03000000 ... Image Name: Linux-3.14.0-xilinx-13567-g906a2 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3819296 Bytes = 3.6 MiB Load Address: 00008000 Entry Point: 00008000 Verifying Checksum ... OK ## Loading init Ramdisk from Legacy Image at 02000000 ... Image Name: Image Type: ARM Linux RAMDisk Image (gzip compressed) Data Size: 3694108 Bytes = 3.5 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 02a00000 Booting using the fdt blob at 0x2a00000 Loading Kernel Image ... OK Loading Ramdisk to 1f7a9000, end 1fb2ee1c ... OK Loading Device Tree to 1f7a4000, end 1f7a8ccd ... OK Starting kernel ... Uncompressing Linux... done, booting the kernel. [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 3.14.0-xilinx-13567-g906a2c9 (Squirrel@centos6-6-i386) (gcc version 4.8.3 20140320 (prerelease) (Sourcery CodeBench Lite 2014.05-23) ) #1 SMP PREEMPT Sun Feb 1 23:13:26 EST 2015 [ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] Machine model: Xilinx Zynq [ 0.000000] bootconsole [earlycon0] enabled [ 0.000000] cma: CMA: reserved 128 MiB at 17400000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] PERCPU: Embedded 8 pages/cpu @dfb9e000 s10752 r8192 d13824 u32768 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 130048 [ 0.000000] Kernel command line: console=ttyPS0,115200 root=/dev/ram rw earlyprintk [ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) [ 0.000000] Memory: 371800K/524288K available (5133K kernel code, 319K rwdata, 1888K rodata, 206K init, 5339K bss, 152488K reserved, 0K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) [ 0.000000] vmalloc : 0xe0800000 - 0xff000000 ( 488 MB) [ 0.000000] lowmem : 0xc0000000 - 0xe0000000 ( 512 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc06e3a0c (7023 kB) [ 0.000000] .init : 0xc06e4000 - 0xc0717a00 ( 207 kB) [ 0.000000] .data : 0xc0718000 - 0xc0767d40 ( 320 kB) [ 0.000000] .bss : 0xc0767d4c - 0xc0c9eb88 (5340 kB) [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] RCU lockdep checking is enabled. [ 0.000000] Dump stacks of tasks blocking RCU-preempt GP. [ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2 [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ps7-slcr mapped to e0802000 [ 0.000000] zynq_clock_init: clkc starts at e0802100 [ 0.000000] Zynq clock init [ 0.000016] sched_clock: 64 bits at 325MHz, resolution 3ns, wraps every 3383112499200ns [ 0.008513] ps7-ttc #0 at e0804000, irq=43 [ 0.013583] Console: colour dummy device 80x30 [ 0.017925] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar [ 0.026005] ... MAX_LOCKDEP_SUBCLASSES: 8 [ 0.030023] ... MAX_LOCK_DEPTH: 48 [ 0.034195] ... MAX_LOCKDEP_KEYS: 8191 [ 0.038612] ... CLASSHASH_SIZE: 4096 [ 0.042966] ... MAX_LOCKDEP_ENTRIES: 16384 [ 0.047438] ... MAX_LOCKDEP_CHAINS: 32768 [ 0.051939] ... CHAINHASH_SIZE: 16384 [ 0.056383] memory used by lock dependency info: 3695 kB [ 0.061828] per task-struct memory footprint: 1152 bytes [ 0.067275] Calibrating delay loop... 1292.69 BogoMIPS (lpj=6463488) [ 0.110963] pid_max: default: 32768 minimum: 301 [ 0.116272] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.122815] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.137416] CPU: Testing write buffer coherency: ok [ 0.143727] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.149367] Setting up static identity map for 0x4deb20 - 0x4deb78 [ 0.155737] L310 cache controller enabled [ 0.159695] l2x0: 8 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x72760000, Cache size: 512 kB [ 0.240373] CPU1: Booted secondary processor [ 0.328288] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.329286] Brought up 2 CPUs [ 0.342149] SMP: Total of 2 processors activated. [ 0.346849] CPU: All CPU(s) started in SVC mode. [ 0.354942] devtmpfs: initialized [ 0.365684] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4 [ 0.380025] regulator-dummy: no parameters [ 0.393190] NET: Registered protocol family 16 [ 0.401863] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.415505] cpuidle: using governor ladder [ 0.419488] cpuidle: using governor menu [ 0.446479] syscon f8000000.ps7-slcr: regmap [mem 0xf8000000-0xf8000fff] registered [ 0.458166] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers. [ 0.466285] hw-breakpoint: maximum watchpoint size is 4 bytes. [ 0.472549] zynq-ocm f800c000.ps7-ocmc: ZYNQ OCM pool: 256 KiB @ 0xe0880000 [ 0.544156] bio: create slab <bio-0> at 0 [ 0.553161] vgaarb: loaded [ 0.557675] SCSI subsystem initialized [ 0.563866] usbcore: registered new interface driver usbfs [ 0.569764] usbcore: registered new interface driver hub [ 0.575516] usbcore: registered new device driver usb [ 0.582260] media: Linux media interface: v0.10 [ 0.587089] Linux video capture interface: v2.00 [ 0.592334] pps_core: LinuxPPS API ver. 1 registered [ 0.597169] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <> [ 0.606720] PTP clock support registered [ 0.611712] EDAC MC: Ver: 3.0.0 [ 0.617963] Advanced Linux Sound Architecture Driver Initialized. [ 0.634062] DMA-API: preallocated 4096 debug entries [ 0.638903] DMA-API: debugging enabled by kernel config [ 0.644867] Switched to clocksource arm_global_timer [ 0.708238] NET: Registered protocol family 2 [ 0.715250] TCP established hash table entries: 4096 (order: 2, 16384 bytes) [ 0.722338] TCP bind hash table entries: 4096 (order: 5, 147456 bytes) [ 0.730569] TCP: Hash tables configured (established 4096 bind 4096) [ 0.737032] TCP: reno registered [ 0.740170] UDP hash table entries: 256 (order: 2, 20480 bytes) [ 0.746333] UDP-Lite hash table entries: 256 (order: 2, 20480 bytes) [ 0.753847] NET: Registered protocol family 1 [ 0.759760] RPC: Registered named UNIX socket transport module. [ 0.765613] RPC: Registered udp transport module. [ 0.770279] RPC: Registered tcp transport module. [ 0.775041] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.782471] Trying to unpack rootfs image as initramfs... [ 0.789428] rootfs image is not initramfs (no cpio magic); looks like an initrd [ 0.820701] Freeing initrd memory: 3604K (df7a9000 - dfb2e000) [ 0.826926] hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available [ 0.840797] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.854401] jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc. [ 0.862054] msgmni has been set to 989 [ 0.867470] io scheduler noop registered [ 0.871278] io scheduler deadline registered [ 0.875743] io scheduler cfq registered (default) [ 0.898146] dma-pl330 f8003000.ps7-dma: Loaded driver for PL330 DMAC-2364208 [ 0.905152] dma-pl330 f8003000.ps7-dma: DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16 [ 0.917201] e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 82, base_baud = 3125000) is a xuartps [ 0.926628] console [ttyPS0] enabled [ 0.926628] console [ttyPS0] enabled [ 0.933683] bootconsole [earlycon0] disabled [ 0.933683] bootconsole [earlycon0] disabled [ 0.945191] xdevcfg f8007000.ps7-dev-cfg: ioremap 0xf8007000 to e0866000 [ 0.955067] [drm] Initialized drm 1.1.0 20060810 [ 0.993196] brd: module loaded [ 1.015640] loop: module loaded [ 1.031437] m25p80 spi0.0: found s25fl128s1, expected n25q128 [ 1.037538] m25p80 spi0.0: s25fl128s1 (16384 Kbytes) [ 1.042563] 4 ofpart partitions found on MTD device spi0.0 [ 1.048028] Creating 4 MTD partitions on "spi0.0": [ 1.052776] 0x000000000000-0x000000400000 : "qspi-fsbl-uboot" [ 1.066957] 0x000000400000-0x000000900000 : "qspi-linux" [ 1.076913] 0x000000900000-0x000000920000 : "qspi-device-tree" [ 1.087381] 0x000000920000-0x000001000000 : "qspi-user" [ 1.106651] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k [ 1.112402] e1000e: Copyright(c) 1999 - 2013 Intel Corporation. [ 1.124122] libphy: XEMACPS mii bus: probed [ 1.130924] xemacps e000b000.ps7-ethernet: pdev->id -1, baseaddr 0xe000b000, irq 54 [ 1.141681] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 1.148901] ehci-pci: EHCI PCI platform driver [ 1.156590] zynq-dr e0002000.ps7-usb: Unable to init USB phy, missing? [ 1.164005] usbcore: registered new interface driver usb-storage [ 1.172938] mousedev: PS/2 mouse device common for all mice [ 1.180566] i2c /dev entries driver [ 1.193029] zynq-edac f8006000.ps7-ddrc: ecc not enabled [ 1.199256] cpufreq_cpu0: failed to get cpu0 regulator: -19 [ 1.207779] Xilinx Zynq CpuIdle Driver started [ 1.214034] sdhci: Secure Digital Host Controller Interface driver [ 1.220346] sdhci: Copyright(c) Pierre Ossman [ 1.224626] sdhci-pltfm: SDHCI platform and OF driver helper [ 1.230854] mmc0: no vqmmc regulator found [ 1.234961] mmc0: no vmmc regulator found [ 1.274795] mmc0: SDHCI controller on e0100000.ps7-sdio [e0100000.ps7-sdio] using ADMA [ 1.293987] usbcore: registered new interface driver usbhid [ 1.301630] usbhid: USB HID core driver [ 1.318453] TCP: cubic registered [ 1.321696] NET: Registered protocol family 17 [ 1.326698] Registering SWP/SWPB emulation handler [ 1.333921] regulator-dummy: disabling [ 1.338378] drivers/rtc/hctosys.c: unable to open rtc device (rtc0) [ 1.355963] mmc0: new high speed SDHC card at address 0007 [ 1.364071] mmcblk0: mmc0:0007 SD04G 3.70 GiB [ 1.371979] ALSA device list: [ 1.375373] No soundcards found. [ 1.375572] mmcblk0: p1 [ 1.383186] RAMDISK: gzip image found at block 0 [ 1.798555] EXT2-fs (ram0): warning: mounting unchecked fs, running e2fsck is recommended [ 1.807032] VFS: Mounted root (ext2 filesystem) on device 1:0. [ 1.813650] devtmpfs: mounted [ 1.817039] Freeing unused kernel memory: 204K (c06e4000 - c0717000) Starting rcS... ++ Mounting filesystem ++ Setting up mdev ++ Configure static IP ++ Starting telnet daemon ++ Starting http daemon ++ Starting ftp daemon ++ Starting dropbear (ssh) daemon [ 2.584661] random: dropbear urandom read with 8 bits of entropy available ++ Starting OLED Display insmod: can't read '/lib/modules/3.14.0-xilinx-13567-g906a2c9/pmodoled-gpio.ko': No such file or directory ++ Exporting LEDs & SWs rcS Complete zynq> lsusb zynq> However, with any device I have sitting around (some requiring power from the host USB, others not) I can't get the "lsusb" command to show them (and Linux does not print out anything stating it found anything new). I have a suspect there is something I need to do to my design, but I can't figure out what. I have USB0 in the PS7 block enabled for MIO 28-39, but the actual output from the PS7 does not currently connect to anything... (doesn't the MIO bank take care of all that?). I have JP1 shorted as required. Thanks in advance!
  24. A customer asked if the Nexys 4 kit includes the micro USB cable to program the board. Here is my answer: The Nexys 4 includes the FPGA development board and the USB A to micro B cable in the DVD case. See the picture below.
  25. Hi Folks I'm using an Analog Discovery. For my current project I need to isolate it, but it doesn't work when I try to connect it with a USB isolator. According to the manual... I've tried USB isolators from 2 different manufacturers. The Analog Discovery doesn't work with either of them. When the device connects I get an error message during device configuration (image attached). Is it possible that the software has changed so that it now doesn't work correctly with a USB isolator? It may be a timing issue during configuration, since the isolator only runs at 12Mbps. If so, is it possible to download an old version of the software that does work with a USB isolator? Any help would be appreciated.