Search the Community

Showing results for tags 'jtag'.

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


  • News
    • New Users Introduction
    • Announcements
  • Digilent Technical Forums
    • FPGA
    • Digilent Microcontroller Boards
    • Non-Digilent Microcontrollers
    • Add-on Boards
    • Scopes & Instruments and the WaveForms software
    • LabVIEW
    • FRC
    • Other
  • General Discussion
    • Project Vault
    • Learn
    • Suggestions & Feedback
    • Buy, Sell, Trade
    • Sales Questions
    • Off Topic
    • Educators
    • Technical Based Off-Topic Discussions


  • Community Calendar

Find results in...

Find results that contain...

Date Created

  • Start


Last Updated

  • Start


Filter by number of...


  • Start





Website URL







  1. Hi, I'm having a problem programming di EEPROM of the FT2232HQ on my Digilent CMOD A7 35T board with FT_PROG, I hope someone can help. I wanted to change the hardware and the drivers of the A port to UART and VCP respectivly. After that, noticing that I couldn't program the FPGA with Vivado anymore, I re-programmed the FTDI with FT_PROG to its initial state (port A with 245FIFO hardware and D2XX Direct drivers), but I'm still not able to program the FPGA with Vivado because it seems to not recognize any hardware target. It seems that the FTDI is not able to connect to and to control the JTAG c
  2. Hi, I have just received a CMOS S6 evaluation board (410-282P-KIT). Before I program it with my development code I wanted to verify my setup is working Ok. I am using Xilinx 14.7 on a Windows 7 PC. I have loaded iMPACT and successfully initialised the scan chain. I assigned the demo bit file to the FPGA and the demo mcs file to the flash device. When I ask it to iMPACT to verify the contents of the flash memory it fails at address 0. The iMPACT console output is displayed below. INFO:iMPACT - Current time: 11/07/2016 13:18:16 PROGRESS_START - Starting Operation. Maximum
  3. Hi, Is it possible to program the JTAG-USB cable directly via the FTDI D2XX library, bypassing the Adept DJTG library? It seems to be possible to identify the device after a call to FT_SetVIDPID, but FT_OpenEx always seems to return FT_DEVICE_NOT_OPENED. Is another step needed first? Or is the source code for the Adept SDK libs available? Thanks, Jon
  4. Hi all, I wondered if anyone could help. I'm trying to program up the Arty board on Ubuntu 14.04 running in a virtualbox on Windows 10. I can get the board to program up through Windows directly, but not via the Ubuntu virtual machine. I get the following debug info: May 15 18:36:36 simon-VirtualBox kernel: [10042.685578] usb 1-1: new high-speed USB device number 11 using ehci-pci May 15 18:36:37 simon-VirtualBox kernel: [10043.014001] usb 1-1: New USB device found, idVendor=0403, idProduct=6010 May 15 18:36:37 simon-VirtualBox kernel: [10043.014005] usb 1-1: New USB de
  5. Has anybody used one of the USB over CAT5/6 extenders with a Digilent JTAG programming cable? Something like this: We're trying to program devices that are either in different rooms or across the room from the programming computer. The main concern is that USB may not be able to supply enough power for both adapters and the JTAG device. Thanks, Will
  6. Hi. cant program xcf04s with jtag-hs1 rev.a, adept says: ===== Digilent Adept ===== Adept System Rev 2.7 Adept Runtime Rev 2.16 Adept Application Rev 2.4.2 Copyright © 2010 Loading board information... Warning: Could not find specific board information Initializing Scan Chain... Default information loaded. Found device ID: d5c66093 Initialization Complete. Device 1: UNKNOWN cpld unknown. but the same cable works alright with xcf02s. also jtag-usb works ok with this xcf04s
  7. Hi all, I want to know the detail dimension of JTAG-USB cable connector header pin. I know this is very common header pin connector, but I want to understand its pin length and width to ensure the connection. Does anyone know about this? Thank you!
  8. imaviet

    JTAG SMT1 vs. SMT2

    Hello, I am looking to replace the JTAG SMT1 programming module on a VC701 evaluation board with a Virtex 7 FPGA due to a bad micro USB connector. The JTAG SMT1 module is not in stock anymore, and I was wondering if JTAG SMT2 would be compatible with the eval board I am using. The difference between the two modules are SMT2 has GPIO. The rest of the JTAG port connections are identical. Since I will not be using the GPIO, is it ok to leave these pins floating? Thank you for your help. VC701
  9. When I updated the FTDI VCP drivers( ,win7 X64 2.12.10), the ARTY onboard JTAG disappeared. And there are two USB-TO-COM on my computer. See attachment, please. Any suggestions?
  10. Hi, I went to my college laboratory supervisor and asked if they had a JTAG programmer I could check out. He said, "yeah but there's a catch..." and the catch turned out to be twofold: one, sure I can have them if I don't mind please keeping them and two, they're parallel port. It turns out that JTAG hasn't been used for teaching computer engineering at my college for about two years, now. There is a giant pile of parallel-port JTAG programmers from Digilent sitting around, and I was given three of them to take home. I'm sitting here wondering how effective these will be if I patch them throug
  11. Hello I have a problem with AES-XLX-V5LX-EVL110-G when I implement of following examples V5LX Evaluation Boot Loader Example Design V5LX Evaluation Interrupt Example Design V5LX Evaluation Xilinx Micro Kernel (XMK) Example Design V5LX Evaluation lwIP Web Server Example Design V5LX Evaluation System ACE Module Example Design in part of programming fpga for Jtag, i have folloguin error: Creating backup of last automatically saved project to 'C:\Xilinx\14.3\ISE_DS\ISE\auto_project_1.ipf'. Enumerating cables. Please wait. Connecting to cable (Usb Port - USB21). Checking cable driver. Driver file x
  12. I currently have an Atmel ATMEGA644A microcontroller on a custom made PCB, and I need to figure out how to program it. I didn't know if the cable sold ( was enough to program the board on its own, or if I needed a USB to JTAG adapter as well. Could someone please shed some light on this?
  13. j.kellerNPE

    SMT2 Replacement

    Hi, I saw on a different thread ( that the SMT2 can serve as a drop-in replacement for the SMT1 as long as the GPIO pins are left floating. I have here a KC-705 development board ( with a broken SMT1 on it. Is the SMT2 footprint-compatible as well? Thanks, Jon
  14. I am defeated. I am trying to install the Digilent drivers for JTAG and Serial Port on a Windows 7 system (the product is the Synopsys ARC EM Starter Kit). The USB Serial Port driver (Serial Converter B ) installs correctly and I can get output on Putty. Originally, the Serial Converter A driver installed as a VCP (Serial port driver), and I could not get it to install as anything else. In this configuration, the Adept program recognized the starter kit board as a Digilent device, but the Metaware IDE configured for the JTAG debugger could not find it. I rooted around and found that I could
  15. Hi, I use JTAG HS2 with Synopsys Metaware for ARC debugging. I can download the information successfully. However, the speed is very slow. The download speed is about 1KB/s. I checked the protocol with logic analyzer and found the root cause is that the gap between IR and DR is about 1ms. One DWORD takes IR-DR-IR-DR. Was the gap caused by HS2 HW, driver or software? Thanks!
  16. Jnadin

    Jtag HS3

    Hi All, I am having issues using the JTAG HS3 with my PCB that uses zynq 7020 chip. I have tried using it with zc702 and zedboard and these seems to work however plugging the device into my board the device is not found. I am guess there is something I have missed when designing the board. I have the lines pulled high to 3V3 which then go to the FPGA. Is there any thing else I need to consider for the PCB to work with this device? was anyone able to design a board that had this JTAG working? Kind Regards, J. Nadin
  17. Hi all I'm still using a Spartan3e starter kit for various issues (it's aged but still very usefull). For my current project i need to program the Spartan using an external uP that i want to connect to the connector for extended JTag (J28). Now i become unsecure how this should work. The s3e1600 board provides an integrated JTag programmer. Unfortunally it is not documented in the schematic's since it is an Xilinx proprietary design. Moreover J28 does not provide anything like the PGND signal, found i.e. at the Xilinx platform cable USB II. Hence the S3e1600 board can't detect a connected JTag
  18. Hello, I am new to FPGA programming so I am trying to do the Basys 3 Getting Started tutorial from the wiki. However, when I try to open a hardware target in Vivado, I get the error: [Labtoolstcl 44-26] No hardware targets exist on the server [TCP:localhost:3121] Check to make sure the cable targets connected to this machine are properly connected and powered up, then use the disconnect_hw_server and connect_hw_server commands to re-register the hardware targets. The cables seem to be properly connected and the board is on. I followed the commands above and get the same error. I uninstalled a
  19. ks0ze

    JTAG SMT2 chain limit

    Is there a limit on the number of devices the JTAG-SMT2 module can reliably have in the chain? Thanks, Dan
  20. Hi! I am currently working on a project which uses a particular version of an ARM Cortex M0. Therefore I can not use Xilinx' tools to debug the ARM core directely. Using a Nexys 3 with a Spartan 6 I am looking for other ways to debug it: In the ARM forum a user pointed out that ARM has a debugger platform called CMSIS-DAP. Does Digilent support this platform? I currently use a JTAG USB debugger from Digilent, does it support CMSIS-DAP?If not, do you know of any other possibility on how I could debug the ARM core directly and without using Xilinx tools?Any help is much appreciated!
  21. Hello, I am fairly new to linux and I am trying to program a cerebot nano. I have the JTAG-USB cable with SPI, rev. b. I have downloaded wine and the AVR programmer but I don't see the device when I enumerate in the AVR programmer. If I use djtgcfg enum, from the terminal: [email protected] ~ $ djtgcfg enum Found 2 device(s) Device: DCabUsb Product Name: DCabUsb1 V2.0 User Name: DCabUsb Serial Number: 50003C003874 I did install the usb drivers that came with the AVR programmer, using wine. Any ideas?
  22. Jo-Jo

    Can't Program Zybo

    I'm new to FPGA work, but I think there is something wrong with the Zybo board I just received. Vivado tells me there are no debug cores. When I try to program it it says the debug core was not detected. I'm using the same project I used to program a different Zybo board, so I don't think it's the project configuration. I searched on the Vivado forum, and all I found was that this will happen if the JTAG clock frequency is less than the ILA clock frequency. I have no idea what that means. Vivado suggested I manually launch hw_server with some parameters specified. I tried that, but I still h
  23. I'd like to know about moisture sensitive level (MSL) of part DIGILENT : JTAG-SMT2 , What is MSL?
  24. Hi, I'm wondering what the best approach would be to get my python code to talk to an HS1 device? My questions are: 1) What DLLs do I need to have on my target machine? 2) Should I create a PYD or can I speak to the library functions in a different way? 3) What is the latest version of the SDK ( Adpet?? ) and how are folks using it? Thanks for any pointers, Duncan
  25. We have been using the JTAG-USB for years, and need to purchase a couple more programmers. Should we be considering the JTAG-HS2 instead? It seems to do everything the JTAG-USB does, but with a faster programming rate. We typically create SVF files using iMPACT, and then use Adept on the production floor to do the programming of Xilinx XC9572XL CPLDs. The JTAG-USB works fine, but if the JTAG-HS2 will program faster, but still works essentially the same, it would be worth trying. Also, any comments regarding the upcoming JTAG-HS3 in the context of this question? Thanks in advance! Paul