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Found 85 results

  1. smarano

    eFuse Programming

    Hi I'm tring to program my cmod a7 35T Digilent board with an encrypted bitstream. I read that to do this i need to program the eFuse register with a key.nky file, but when i try to do this i found a problem. This board don't have a jtag connector but it can be programmed via usb. When i try to program efuse a found a problem "cannot program efuse register with this cable". Anyone can tell me if there is another way to program efuse or if this board can't support encryption bitstream? regards Stefano
  2. Hello, everyone. We are planning to access JTAG by attaching a pin header to J8 of Arty board in order to confirm efuse access. (I dont use USB-JTAG.) Which signal corresponds to each of the six through holes of J8? I check the reference manual and circuit diagram, but there is no clear description. From the relationship with the D1 diode on the circuit diagram, I guess the following order. Is it correct? 1. TMS_JTAG (suquare, 1 pin mark?) 2. TDI_JTAG (circle) 3. TDO_JTAG (circle) 4.TCK_JTAG (circle) 5. GND (circle) 6. VCC 3 V 3 (circle) best regards, ryo
  3. gm_

    JTAG HS2 completely silent

    Hi all, I have just tried my JTAG HS2 on 4 PC with windows and linux, but the device is not recognized by any of them. I also tried to change the usb cable to no avail. Any idea to what else I could do before sending it back? Thanks!
  4. Dear all, I would like to buy JTAG HS2, but I have the followings doubts: 1. is it recognised by Fedora? 2. does it support debugging? 3. does it work with urJTAG? 4. is it compatible with openOCD? Thanks! gm
  5. Hi, I am trying to rebuild the arty z7 petalinux BSP as per the instructions given by them here https://github.com/Digilent/petalinux-bsps/wiki/Quick-Start-Guide-for-Arty-Z7. But when I try the command $ petalinux-boot --jtag --prebuilt 3, I get an error saying [skaat27@localhost Digilent-Arty-Z7-Linux-BD-v2016.2]$ petalinux-boot --jtag --prebuilt 3 ERROR: No subsystem configuration file can be find in the project. sh: lsb_release: command not found webtalk failed:Invalid tool in the statistics file:petalinux-yocto! webtalk failed:Failed to get PetaLinux usage statistics! Anybody knows what the issue is? Karthik
  6. I have a Z-Turn FPGA, based around a Xilinx Zynq 7020. Unfortunately, its JTAG port is 2x7 with 2.54mm pitch. I just realized the HS3 uses 2.00mm pitch. Is there a recommended way to convert the pin pitch? I designed my own board, but an existing option would be more convenient.
  7. Jennifer

    Impact 13.2

    I am running Impact 13.2 (Windows 64-bit). I have installed the Digilent plugins. When I try to initialize the JTAG chain, I get an error saying that the selected cable is being used by another application. There are no other cables attached to the laptop.
  8. Hello I'm using Digilent JTAG-HS3 Programming Cable with a Zynq 7000 based board. With HS3, I'm able to program the PL of the Zynq using Vivado 2016.4. In my application, I need to have an extension cable connection the Zynq to the HS3; this extension cable is about 1m long. In case I set the reference voltage on the base board to 2.5V, I'm able to connect to the Zynq, program it and flash the QSPI memory. On the other hand, if I change the reference voltage on the base board to 3.3V, I'm not able to detect the Zynq at all. In Vivado, I obtain the error message: ERROR: [Labtools 27-2269] No devices detected on target localhost:3121/xilinx_tcf/Digilent/210299A1F0C9. Are there any specific requirements to make the extension cable work with HS3 and Zynq using 3.3 reference voltage?
  9. Hi - I just tried to install the XUP USB-JTAG Programming Cable from diligent. I also have a Diligent Programming Cable. Centos can see both cables (see below) Vivado can see the Diligent programming cable but not the Xilinx one. Given the physical constraints of the installation only the Xilinx one will work. Are there any specific instructions to get the Xilinx cable going? $lsusb | grep "Xilinx/|Future" Bus 002 Device 003: ID 03fd:000d Xilinx, Inc. Bus 001 Device 006: ID 0403:6014 Future Technology Devices International, Ltd FT232H Single HS USB-UART/FIFO IC
  10. I have a device that loses all its firmware when the battery dies and would like to be able to copy the firmware from a good one so I can reload the firmware to ones that have died to get them running again. I know the chip inside is a Dallas DS5250FP-825 and the connector the device uses to communicate is a 6 pin JTAG. What tools will I need to do this? Sorry I'm new to all this so any info or a point in the right direction will be helpful and I'll try to answer any question I can.
  11. I'm trying to use the Adept Utility to program a 3A-DSP1800 device with the HS1 JTAG cable. I have no issues with a regular 3A device. With the 3A-DSP1800 device the utility correctly reads the ID code but displays "UNKNOWN DEVICE" where it should display the correct device. My memory is a bit fuzzy on this, but I seem to recall that the utility needs to have specific devices listed in some configuration file for the cable. I have no idea where to look. I was able to use IMPACT to program the device using the HS1 so I know that the issue is software related. Any help would be appreciated as it sure is nice using the Adept Utility in windows; and I'm not particularly fond of Impact. Also, the Adept Utility and Impact don't get along even when the Adept Utility is connected to a different device ( in my case it is ).
  12. Hi, It gave such errors when I tried to download data from CentOS virtual machine: .................[DIGILENT] transmit (DpcPutTmsTdiBits): xmit failed of 16 bits [DIGILENT] DPC error returned 3076 is unknown. [DIGILENT] transmit (DpcPutTmsTdiBits): xmit failed of 8 bits [DIGILENT] DPC error returned 3076 is unknown. [DIGILENT] transmit (DpcPutTmsTdiBits): xmit failed of 8 bits [DIGILENT] DPC error returned 3076 is unknown. [DIGILENT] transmit (DpcPutTmsTdiBits): xmit failed of 8 bits [DIGILENT] DPC error returned 3076 is unknown. [DIGILENT] transmit (DpcPutTmsTdiBits): xmit failed of 8 bits [DIGILENT] DPC error returned 3076 is unknown. And on native Linux machine it works just fine. Any idea how to fix this issue? Thanks, Dexian
  13. Hi everyone, I have started using the Nexys Video board and have a question about DPTI before starting: I understand that when channel A is used in synchronous FT245 mode in the FT2232 chip that channel B is switched off. Is that correct? That would mean I cannout use synchronous DPTI in parallel with Vivado debugging, right? One alternative is using asynchronous mode apparently, but I am also wondering if I could connect my debug cable to the unequipped JTAG port instead? Anyone tried that setup? Cheers, Stefan
  14. Hi Digilent Users, In 2006, I bought one of your development PCBs which is marked "Xilinx XC2-XL" and has one XC9572XLVQ44C, one XC2C256TQ144C, and a very nice prototyping area. The associated paperwork gives the part number as "DO-CPLD-DK" which matches the Obsolete Digikey P/N 122-1512-ND. The good news - When I powered up the board with two AA batteries, the LEDs responded to the pushbutton. The bad news - The kit that I have has a Parallel Port - JTAG cable. The question - Can I use JTAG-USB PROGRAMMING CABLE, Digikey P/N 1286-1052-ND, Digilent P/N 250-003 to program my PCB? Thanks, Dave Crafts
  15. Within the schematics of the NEXYS 4 and NEXYS VIDEO boards I couldn't find the part with the Micro-USB JTAG bridge. The part with the FT2232HQ chip is left out in both schematics. Is there a reason for neglecting those parts? Could I find the schematics elsewhere? I'm especially interested in the differences between a combined JTAG and UART Micro-USB solution (as seen on NEXYS 4) and two separate solutions Micro-USB JTAG (1) and Micro-USB UART (2) (as seen on NEXYS VIDEO).
  16. The micro-USB2 connector on my JTAG-SMT2 mounted to a ZC-706 has "come off" and I need to replace it. Can you provide the appropriate part number? Thanks, Brendon
  17. Hi, We were using Metaware debugger with Digilent JTAG-HS2 cable HS2 RevA for JTAG connection. When 7 processors are in chain, first processor in the chain is not able to read back the memory into Metaware GUI. We notice that write/read is happening correctly in the design by chipscope debugger. We tried many other processor chain combinations and were able to get the metaware working with 8/9/10/11 processors but not 7 processor chain. Currently we have many such digilent HS2 RevA cables purchased online (Sandisk India Design Centre, Bangalore) and all of them facing the same issue. We have installed the new Adept driver digilent.adept.system_v2.16.4 and still the issue exist. We are suspecting hardware issue in the cable. Let me know if someone from Digilent support could have done a fix?
  18. Any chance of support for JTAG protocol on the Digital Discovery? How about a driver for openocd that could turn the DigitalDiscovery in a jtag host. It could program the fpgas and flash memory, run gdb and collect trace data all from one little box. I am impressed. Is there an academic price ? John Eaton
  19. Hi everyone ! I'd like to use the JTAG-HS3 cable to work on a project which consists in testing several interconnections between devices on a board. I'm using DJTG and DMGR APIs and i'm connected via ssh to the computer which has the cable plugged on. My question is: How do i connect to the board with the DMGR API? I know that i have to use DmgrOpen() function but it requires a "device name", which i don't have. Thanks in advance ! Have a nice day !
  20. Hi, I'm using Digilent's XUP USB-JTAG Programming Cable to program 'Z-turn board' which uses Xilinx Zynq-7000(http://www.myirtech.com/list.asp?id=502). There was no problem when I programed Bitstream or BBRAM through JTAG, but when I tried to program eFUSE Xilinx Vivado threw an error - ERROR: [Labtools 27-3277] jsn-DLC9LP-00000000000000 cable is not supported for EFUSE programming. Please use a Xilinx PCUSB2 DLC10 or approved Digilent cable I think my cable is approved one. Does anyone have any solution for this? Thank you in advance.
  21. Hi, I'm new to this forum so hopefully this has not been asked already. We have a system that contains an embedded Raspberry Pi 2 board and Xilinx FPGAs. We would like to be able to remotely debug FPGA issues. We have been looking into the Xilinx Virtual Cable (XVC) solution. This would allow us to connect Xilinx debugging tools like Chipscope to our FPGAs over an Ethernet connection. I have seen a few implementations where GPIOs from a Raspberry Pi connected to Xilinx FPGA JTAG signals and XVC server code running on the same Raspberry Pi allow for debugging FPGAs remotely. The code I have seen bit bangs the GPIO pins which seems very inefficient. I was wondering if Digilent has a solution where a Digilent USB to JTAG module is used for the Raspberry Pi to JTAG connection instead of GPIO pins to speed things up. If there was such a solution we would ship something like a JTAG-HS2 with all our systems so we could remotely fix problems at customer sites. Does Digilent have such a solution and if not do they supply Raspberry Pi software APIs that would allow customers to develop such a solution? I took a look at the Adept 2 stuff but that looks like it's targeted at configuring FPGAs. I don't think it's for integrating with Xilinx tools. I also looked at the "Digilent Plugin for Xilinx Tools" but I don't think there is a Raspberry Pi version of the plugin and I'm not sure if the plugin will work with XVC. Thanks in advance. RL
  22. Hello, your user's guide linked below says to use a standard Type-A to Micro-USB cable. What would the effect be using a micro-B cable wired for OTG? https://reference.digilentinc.com/_media/jtag_smt2/jtag-smt2_rm.pdf
  23. Hi: I am creating a board based on XC7Z010-1CLG400. According to the design requirements, I need to intergrate the USB to JTAG circuit on board to simplify user's work processing. I can not find the circuit on Zybo SCH. But I found these is similar circuit done by FT232HQ and 93LC56BT on Zed sch. Then my questions are: 1) Dose this circuit make sense to XC7Z010-1CLG400? 2) Are these any additional configurations need to be processed on FT232HQ or 93LC56BT? 3) Are these any additional configurations need to be processed on PC side or Vivado side? Tks!
  24. Hi, I just updated all of our test PCs from XP to Windows 7. We were using "Device Programming" from WebPACK_42wp30_full_installer.exe to program our Xilinx XC9500 CPLDs. We use the JTAG3 (Parallel Port) cable to program our devices. It has become apparent to me, i believe, that there is a compatibility issue with this WebPACK version and Windows 7. Does anyone know where I can find the WebPACK that will program our CPLDs using Windows 7? I've been on Xilinx's website and there are too many options, so if you could be as specific as possible I would sincerely appreciate it. Thank you Ryan
  25. Hi, I am working on a unit that has Spartan 6 XC6SLX9 (TGFP144) devices. Each board has 1 Spartan 6 on it and each board is just a copy of the other (briefly, the unit is a 4 channel transmitter and I have each board handling 1 channel - so they are identical copies). I'm trying to find the best way to program these boards in the field remotely (so I can't rely on removing / attaching cables, pushing buttons etc.) One possible solution is to use this: http://store.digilentinc.com/jtag-smt2-nc-surface-mount-programming-module/ on my motherboard and daisy chain JTAG lines as per Xilinx docs. QUESTION: Can I use the JTAG-SMT2-NC with a full speed USB port (as opposed to a high speed USB port)? The USB hub we use on our motherboard is full speed only. I am not looking for any specific JTAG programming speeds. Second solution I have is to have an SPI flash for each FPGA and have them all on the same "shared" bus (the SPI flashes would be programmed by my uC on the motherboard). Since the FPGAs take control of the SPI bus on configuration, I'd be "de-coupling" the "shared" bus from the per-board bus with a buffer as shown below: http://imgur.com/a/jpsjx So when PROGRAM_B is raised to HIGH, the buffer tri-states its outputs (so the shared bus from other FPGAs is no longer in contention). QUESTION: Thoughts? Does this seem reasonable? I'm slightly leaning towards the first option - it seems more robust since JTAG was made to do the daisy chaining stuff -- but depends on whether full speed will work. Thanks, Aditya