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Found 14 results

  1. Hello I have a microblaze running a LwIP server adapted from the lwIP server example where everything works fine. LwIP stops working when I use another peripheral with an interrupt attached to it. In my case I have an SPI EEprom running perfectly, but after initialization LwIP stops working. The EEprom code is also standard code from the example. Interrupts are all connected to the microblaze with a concat IP. Has anybody experience in this topic?
  2. Hi, I am having a problem with GPIO interrtupt on Arty A7 board. + 2 GPIO with each of them is dual channel. + INTC instance to connect the interrtup with Microblaze. After I used below software, I can not see the interrupt. Would you please tell me how to debug in next step ? Sorry, I am new to SDK and Arty A7. I want to connect the switch or button as interrupt, and do some task inside a handler. I want to clarify below of my understanding, whether it is correct or not: 1. hardware: - Enable register access in INTC to make the software can access INTC registers. - Choose level (high) as interrupt type. - Fast interrupt is enable. 2. Software: #--------------------------------- /***************************** Include Files *********************************/ #include "xparameters.h" #include "xil_exception.h" #include "xintc.h" #include "xgpio.h" #include "xil_printf.h" #define UART_INT_CHANNEL 0 #define GPIO0_INT_CHANNEL 1 #define GPIO1_INT_CHANNEL 2 XGpio Gpio0; /* The Instance of the GPIO0 Driver */ XGpio Gpio1; /* The Instance of the GPIO1 Driver */ XIntc Intc; /* The Instance of the Interrupt Controller Driver */ void UART_HANDLER(void *Callbackref); void GPIO0_HANDLER(void *Callbackref); void GPIO1_HANDLER(void *Callbackref); void GPIO0_HANDLER(void *Callbackref) { xil_printf("Handler GPIO0 !! \r\n"); //write out GPIO0, LED 0101 XGpio_DiscreteWrite(&Gpio0, 1, 0x05); //Write out GPIO1, LED RGB XGpio_DiscreteWrite(&Gpio1, 1, 0xAA55); } // Main program int main(void) { // 0. Initial GPIO0 Status = XGpio_Initialize(&Gpio1, XPAR_GPIO_1_DEVICE_ID); if (Status != XST_SUCCESS) { return XST_FAILURE; } //Configure the IO direction for GPIO0 ( push button is in channel2): XGpio_SetDataDirection(&Gpio1, 1, 0x00000 ); XGpio_SetDataDirection(&Gpio1, 2, 0xFFFFF ); //1. Init the Interrupt controller Status = XIntc_Initialize(&Intc, 0); if (Status != XST_SUCCESS) { return XST_FAILURE; } //2. Connect the handlers Status = XIntc_Connect(&Intc, GPIO0_INT_CHANNEL, (XInterruptHandler) &GPIO0_HANDLER, (void *) 0); if (Status != XST_SUCCESS) { return XST_FAILURE; } //3. Enable the INTC XIntc_Enable(&Intc, GPIO0_INT_CHANNEL); XIntc_Enable(&Intc, GPIO1_INT_CHANNEL); //4. Start the INTC Status = XIntc_Start(&Intc, XIN_REAL_MODE); if (Status != XST_SUCCESS) { return XST_FAILURE; } //5. Enable interrupt for GPIO0 XGpio_InterruptEnable( &Gpio0, 0x0000); XGpio_InterruptGlobalEnable( &Gpio0 ); // 6. Initi the exception Xil_ExceptionInit(); // Xil_ExceptionRegisterHandler(1, (Xil_ExceptionHandler)GPIO0_HANDLER, 0); // // /* Enable non-critical exceptions */ Xil_ExceptionEnable(); xil_printf("Waiting for interrupt... !! \r\n"); while(1) { } //return return XST_SUCCESS; } //--------------------------------------------------------------------------------
  3. Hello, I am trying to use UART in interrupt mode using zybo board. I tried Hello World example using UART1 of PS which is 48 49 MIO and it is working. I referred interrupt example in ~\Xilinx\SDK\2016.2\data\embeddedsw\XilinxProcessorIPLib\drivers\uartps_v3_1\examples. But I am not connect uart with Interrupt controller or GIC. Any suggestion on designing hardware in vivado and which reference code to use?
  4. Hello, i need urgently a Zynq board which is able to run petalinux; it must support tcp/ip-select and uio-interrupt. I do not know, which digilent board has the examples that include the needed funtionality. I would buy this board because i Need it for my Masterthesis! If you do not have such a board (with the right examples) then please tell me who such a board sells. Or, you give me please a very simple but complete project with only one gpio (Interrupt) that fits on the Arty-Z7-20 board including a petalinux image with the described functionality. My given time is limited and it is very important to me Thank you...
  5. Hi All, I'm start working with the AXI UART Lite in my Block Design with a Microblaze soft core. Actually I've the whole design working, using the xil_printf I'm able to send data out the board to the PC through the Virtual COM Port exposed by the board itself. The better approach involve the use of interrupts in order to manage the RX and TX operations. My first try was to found some documents about this point, found it into the yourdesign_bsp > BSP Documentation > uartlite_v3_2 folder: right click and select Open Documentation give the API list on the browser, the documentation reside locally on the following path (I'm using VIVADO 2016.1): C:/Xilinx/SDK/2016.1/data/embeddedsw/XilinxProcessorIPLib/drivers/uartlite_v3_2/doc/html/api/index.html Opening the: C:/Xilinx/SDK/2016.1/data/embeddedsw/XilinxProcessorIPLib/drivers/uartlite_v3_2 inside the examples there are several examples how to use interrupt with this peripheral, I took the xuartlite_intr_tapp_example.c file. Concerning this example I've some question to asking. Looking through the source code I see: #ifdef XPAR_INTC_0_DEVICE_ID #include "xintc.h" #include <stdio.h> #else #include "xscugic.h" #include "xil_printf.h" #endif First question is about this conditional statement. Starting from the SDK I've opened the xparameters.h file: scroll down until you reach the xparameters.h file. Double click on to open the file and make a search for the XPAR_INTC_0_DEVICE_ID label: This label should be the reference to the AXI Interrupt Controller present into the Block Design (system.pdf).with name microblaze_0_axi_intc. Now I need to know the exact difference between this two type of controller, the AXI is into the Fabric and I think is automatically managed from the Microblaze side by means of a dedicated software layer also the Generic Interrupt Controller I think is also managed by Microblaze but may be I've to configure it in order to instruct what peripheral have to use I'm correct? In this example I'm using the AXI Interrupt Controller so I can avoid to insert the whole code related the Generic Interrupt Controller, correct? Another question is if I'm using the AXI Interrupt Controller there are some reason to use also the Generic Interrupt Controller or I can't use it due to some constraints or other reasons? Someone can give me some explanation about this point? Thank!
  6. I wish to access own ip-cores while i'am using Linux on the Arty-Z7 board. What is the general workflow to write a Linux-Hardware-Driver for the Arty-Plattform? Do you have any examples? Thank you...
  7. Dear all, I hated the fact the Zybo Zynq does not have a proper D/A converter on its own. So I programmed a VHDL 1-bit delta sigma modulator according to this Link. The delta sigma modulator is working as a charm, but I want to be able to set the frequency of the waveforms i am generating. I want to set the frequency of the waveform by using an 1-10V input signal. I am okay with C and VHDL but I have never used the block designs or Zynq IP & GPIO Blocks.. The PMOD connector connected to the fpga is already in use so I guess my options are. Use a external microcontroller with ADC and use SPI to the PS part of the zybo zynq. Use the XADC connect it to the PS and of course use a voltage divider or something Microcontroller and just bit bang the values directly to the PL side Are there any suggestions on the easiest way of doing this ? ps: Is it possible to do something similar to interrupts in VHDL
  8. dzabakh

    UART interrupt example

    Hello everyone! I am facing a problem while working with a project on Zybo. I have UART1 input (the input connected with microUSB port) enabled in my project and I want to make a simple user interface in a standalone application. I have already found several examples of such applications but the thing is that I don't want the program to continuously examine the input - I want the processor to get an interrupt every time the user makes an input. Is there any example of how this has to be done? Thank you in advance.
  9. Hi all, I have an interrupt that is generated by a custom ip and when it is triggered, I read a register from the custom ip and read from the pmod sf3 to write those values back to the custom ip. However the interrupt gets stuck and won't return to the main code when I have the pmod sf3 code in there, but it does when I just read a value from the custom ip and print it. I have attached the c code that I have written. Any ideas why this is happening? Thanks! c_code.txt
  10. Hi ! I'm still working to add a RF module (MRF24J40) on my zybo. The SPI communication works fine, but I have some trouble with interrupt. I'm using linux-yocto as kernel. Here is the design in vivado : The AXI_GPIO 0 and 1 are to use leds, buttons and swtichs on zybo. The AXI_SPI is used to communicate with MRF24J40. And the AXi_GPIO 2 is 3bits wide, one for wake, one for reset, and one for interrupt (for MRF24J40). The interrupts are enable on the AXI_GPIO2. I don't know if it is a good practice to enable interrupt for wake and reset too ? Here is the interrupt enable in the zynq : Then the interesting part of my dts : First of all, I'm not sure to understand what is the interrupt signal in the AXI_SPI. But it seems to have an interrupt, address 61 in kernel, and the interrupt from AXI_GPIO2 should be address 62 right ? Here what I have if I execute a "cat /proc/interrupts" : It seems there isn't the axi_gpio2 interrupt. What am I doing wrong ? Do you have any tips ? Regards, Yohan
  11. Hi, I am using Nexys Video board and fail to trigger interrupt to Microblaze in SDK. So I generate a basic project with only AXI timer, and test with "Peripheral Test" application for xilkernel in SDK, but the test fails as well. In Vivado: 1. select the board and create a block design. 2. add microblaze with interrupt controller. add axi_timer and uartlite. 3. connection as attached figure: ": 4. enable Microblaze exception. generate bitstream. In SDK: 1. generate bsp for xilkernel, and generate an application of "Peripheral Test" in template, and run. Fail when running "Interrupt Test for axi_timer_0" as shown in figure: In fact, I have tried to interrupt from IP generated by vivado AXI interrupt wrapper, or from customer IP (generated interrupt interface myself), no matter with SENSITIVITY being EDGE_HIGH or LEVEL_HIGH, no matter with concast component or single interrupt, no matter enable exception in bsp or microblaze, neither of them succeed in calling my handler. I believe this is not the problem in software (I register handler and enable all interrupts), and even the template application based on basic components still not work. Did I miss anything? Thank you very much! Cynthia
  12. Hi, I am using Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit and I am newbie for using this board. I'm following this link to generate an interrupt using GPIO switches and turn off a led : http://www.wiki.xilinx.com/Linux+GPIO+Driver. The drivers works correctly and the led is heartbeating, when i check /proc/interrupts i get: ... 223: 0 0 0 0 GICv2 154 Level fd4c0000.dma 224: 0 0 0 0 xgpio 0 Edge sw14 233: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1 ... but when i switch on cpu stops and i get this error: root@Xilinx-ZCU102-2016_1:~# [ 18.111391] Unable to handle kernel paging request at virtual address b9410a80aa13043f [ 18.119243] pgd = ffffffc87ad07000 [ 18.122615] [b9410a80aa13043f] *pgd=0000000000000000, *pud=0000000000000000 [ 18.129559] Internal error: Oops: 96000004 [#1] SMP [ 18.134420] Modules linked in: [ 18.137460] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.4.0 #78 [ 18.143361] Hardware name: ZynqMP ZCU102 RevB (DT) [ 18.148136] task: ffffffc00224efc0 ti: ffffffc002240000 task.ti: ffffffc002240000 [ 18.155613] PC is at xgpio_irqhandler+0x2c/0x144 [ 18.160202] LR is at xgpio_irqhandler+0x1c/0x144 [ 18.164801] pc : [<ffffffc0003c8ee0>] lr : [<ffffffc0003c8ed0>] pstate: 600001c5 [ 18.172185] sp : ffffffc002243d00 [ 18.175476] x29: ffffffc002243d00 x28: 0000000000000000 [ 18.180769] x27: 0000000000000000 x26: ffffffc0022c2000 [ 18.186063] x25: ffffffc00078acf0 x24: ffffff8000015000 [ 18.191358] x23: ffffffc0003c8eb4 x22: b9410a80aa1303f7 [ 18.196653] x21: 0000000000000000 x20: 0000000000000000 [ 18.201948] x19: ffffffc002227000 x18: 0000000000000001 [ 18.207242] x17: 0000000000000006 x16: ffffffbe1dae9f68 [ 18.212537] x15: ffffffc87b08f000 x14: 0000000000000007 [ 18.217832] x13: ffffffc87b801128 x12: 0000004000000000 [ 18.223127] x11: ffffffc002246000 x10: 00000000000006e0 [ 18.228422] x9 : ffffffc002243e70 x8 : ffffffc87b400058 [ 18.233716] x7 : ffffffc87b400d88 x6 : 0000000000000002 [ 18.239011] x5 : 00000000fffffffa x4 : ffffffc87b400d89 [ 18.244306] x3 : 0000000000000000 x2 : 0000000000000000 [ 18.249601] x1 : 0000000000000020 x0 : 0000000000000000 [ 18.254895] [ 18.256373] Process swapper/0 (pid: 0, stack limit = 0xffffffc002240020) [ 18.263060] Stack: (0xffffffc002243d00 to 0xffffffc002244000) [ 18.268790] 3d00: ffffffc002243d50 ffffffc0000d1088 ffffffc002227000 0000000000000000 [ 18.276609] 3d20: 0000000000000000 ffffffc002249040 ffffff8000014010 ffffffc0000d13cc [ 18.284421] 3d40: ffffffc002243d50 ffffffc0000d107c ffffffc002243d60 ffffffc0000d13a0 [ 18.292232] 3d60: ffffffc002243da0 ffffffc000080cec ffffff800001400c ffffffc002279000 [ 18.300045] 3d80: ffffffc002243de0 ffffffc0000e5ed0 ffffffc87b808000 00000079000ec410 [ 18.307857] 3da0: ffffffc002243f00 ffffffc000083da8 ffffffc002240000 ffffffc002246000 [ 18.315668] 3dc0: ffffffc002243f00 ffffffc000084e70 0000000060000145 ffffffc002228f40 [ 18.323480] 3de0: 0000000000000000 0000000000000000 0000000000000001 0000000000000000 [ 18.331292] 3e00: 0000000000000000 000000001999999a 002aad4b00000000 00000000fffeecaa [ 18.339104] 3e20: 00000000fffeecab ffffffc002243e70 00000000000006e0 ffffffc002246000 [ 18.346916] 3e40: 0000004000000000 ffffffc87b801128 0000000000000007 ffffffc87b08f000 [ 18.354729] 3e60: ffffffbe1dae9f68 0000000000000006 0000000000000001 ffffffc002240000 [ 18.362541] 3e80: ffffffc002246000 ffffffc002246ad0 ffffffc0022259c0 ffffffc002243f20 [ 18.370352] 3ea0: ffffffc002228f40 ffffffc00078acf0 ffffffc0022c2000 0000000000000000 [ 18.378164] 3ec0: 0000000000000000 ffffffc002243f00 ffffffc000084e6c ffffffc002243f00 [ 18.385977] 3ee0: ffffffc000084e70 0000000060000145 ffffffc00078acf0 ffffffc00077c278 [ 18.393789] 3f00: ffffffc002243f10 ffffffc0000ca2e0 ffffffc002243f20 ffffffc0000ca418 [ 18.401600] 3f20: ffffffc002243f90 ffffffc000779080 ffffffc0022c5000 ffffffc0022c5000 [ 18.409413] 3f40: ffffffc0022c5000 ffffffc002246000 ffffffc87ffa2580 ffffffc000a6fca8 [ 18.417224] 3f60: 000000000231c000 000000000231f000 ffffffc0000801d8 0000000000000000 [ 18.425037] 3f80: ffffffc002243f90 ffffffc000779078 ffffffc002243fa0 ffffffc000a3d94c [ 18.432848] 3fa0: 0000000000000000 0000000000780000 0000000000000000 0000000000000e12 [ 18.440660] 3fc0: 0000000004080000 0000000000000000 0000000000000000 0000000000000000 [ 18.448472] 3fe0: 0000000000000000 ffffffc000a6fca8 0000000000000000 0000000000000000 [ 18.456281] Call trace: [ 18.458707] [<ffffffc0003c8ee0>] xgpio_irqhandler+0x2c/0x144 [ 18.464353] [<ffffffc0000d1088>] generic_handle_irq+0x24/0x38 [ 18.470079] [<ffffffc0000d13a0>] __handle_domain_irq+0x60/0xac [ 18.475895] [<ffffffc000080cec>] gic_handle_irq+0x60/0xb4 [ 18.481274] Exception stack(0xffffffc002243db0 to 0xffffffc002243ed0) [ 18.487699] 3da0: ffffffc002240000 ffffffc002246000 [ 18.495518] 3dc0: ffffffc002243f00 ffffffc000084e70 0000000060000145 ffffffc002228f40 [ 18.503329] 3de0: 0000000000000000 0000000000000000 0000000000000001 0000000000000000 [ 18.511142] 3e00: 0000000000000000 000000001999999a 002aad4b00000000 00000000fffeecaa [ 18.518954] 3e20: 00000000fffeecab ffffffc002243e70 00000000000006e0 ffffffc002246000 [ 18.526766] 3e40: 0000004000000000 ffffffc87b801128 0000000000000007 ffffffc87b08f000 [ 18.534578] 3e60: ffffffbe1dae9f68 0000000000000006 0000000000000001 ffffffc002240000 [ 18.542390] 3e80: ffffffc002246000 ffffffc002246ad0 ffffffc0022259c0 ffffffc002243f20 [ 18.550202] 3ea0: ffffffc002228f40 ffffffc00078acf0 ffffffc0022c2000 0000000000000000 [ 18.558013] 3ec0: 0000000000000000 ffffffc002243f00 [ 18.562868] [<ffffffc000083da8>] el1_irq+0x68/0xc0 [ 18.567643] [<ffffffc0000ca2e0>] default_idle_call+0x1c/0x30 [ 18.573284] [<ffffffc0000ca418>] cpu_startup_entry+0x124/0x1dc [ 18.579101] [<ffffffc000779080>] rest_init+0x74/0x7c [ 18.584049] [<ffffffc000a3d94c>] start_kernel+0x394/0x3a8 [ 18.589427] [<0000000000780000>] 0x780000 [ 18.593421] Code: b4000820 f9400800 f9400414 f9401ef6 (f94026c0) [ 18.599503] ---[ end trace fc72e20977be1640 ]--- [ 18.604096] Kernel panic - not syncing: Fatal exception in interrupt [ 18.610435] CPU3: stopping [ 18.613125] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G D 4.4.0 #78 [ 18.620241] Hardware name: ZynqMP ZCU102 RevB (DT) [ 18.625013] Call trace: [ 18.627447] [<ffffffc000087da8>] dump_backtrace+0x0/0x114 [ 18.632829] [<ffffffc000087ed0>] show_stack+0x14/0x1c [ 18.637865] [<ffffffc000393cf8>] dump_stack+0x84/0xa0 [ 18.642897] [<ffffffc00008d4cc>] handle_IPI+0x18c/0x1a0 [ 18.648104] [<ffffffc000080d28>] gic_handle_irq+0x9c/0xb4 [ 18.653486] Exception stack(0xffffffc87b8efdf0 to 0xffffffc87b8eff10) [ 18.659910] fde0: ffffffc87b8ec000 ffffffc002246000 [ 18.667730] fe00: ffffffc87b8eff40 ffffffc000084e70 0000000060000145 ffffffc002228f40 [ 18.675541] fe20: 0000000000000000 0000000000000000 0000000000000001 0000000000000000 [ 18.683353] fe40: 0000000000000000 000000001999999a 000a037a00000000 00000000fffeed1b [ 18.691165] fe60: 00000000fffeed1c ffffffc87b8efeb0 00000000000006e0 0000000000000005 [ 18.698977] fe80: ffffffc00078b5d4 ffffffc073ad7b80 ffffffc87b325380 ffffffc87ba30000 [ 18.706789] fea0: ffffffbe1db0baa0 0000000000000006 0000000000000001 ffffffc87b8ec000 [ 18.714601] fec0: ffffffc002246000 ffffffc002246ad0 ffffffc0022259c0 ffffffc87b8eff60 [ 18.722413] fee0: ffffffc002228f40 ffffffc00078acf0 ffffffc0022c2000 0000000000000000 [ 18.730224] ff00: 0000000000000000 ffffffc87b8eff40 [ 18.735078] [<ffffffc000083da8>] el1_irq+0x68/0xc0 [ 18.739853] [<ffffffc0000ca2e0>] default_idle_call+0x1c/0x30 [ 18.745496] [<ffffffc0000ca418>] cpu_startup_entry+0x124/0x1dc [ 18.751310] [<ffffffc00008cfcc>] secondary_start_kernel+0x11c/0x140 [ 18.757559] [<000000000008103c>] 0x8103c [ 18.761464] CPU2: stopping [ 18.764157] CPU: 2 PID: 0 Comm: swapper/2 Tainted: G D 4.4.0 #78 [ 18.771273] Hardware name: ZynqMP ZCU102 RevB (DT) [ 18.776045] Call trace: [ 18.778479] [<ffffffc000087da8>] dump_backtrace+0x0/0x114 [ 18.783861] [<ffffffc000087ed0>] show_stack+0x14/0x1c [ 18.788895] [<ffffffc000393cf8>] dump_stack+0x84/0xa0 [ 18.793929] [<ffffffc00008d4cc>] handle_IPI+0x18c/0x1a0 [ 18.799136] [<ffffffc000080d28>] gic_handle_irq+0x9c/0xb4 [ 18.804518] Exception stack(0xffffffc87b8ebdf0 to 0xffffffc87b8ebf10) [ 18.810942] bde0: ffffffc87b8e8000 ffffffc002246000 [ 18.818762] be00: ffffffc87b8ebf40 ffffffc000084e70 0000000060000145 ffffffc002228f40 [ 18.826573] be20: 0000000000000000 0000000000000000 0000000000000001 0000000000000000 [ 18.834385] be40: 0000000000000000 000000001999999a 000f424000000000 00000000fffeed31 [ 18.842197] be60: 00000000fffeed32 ffffffc87b8ebeb0 00000000000006e0 ffffffc002246000 [ 18.850009] be80: 0000004000000000 ffffffc87b801128 000000000000001c ffffffc87ac9c000 [ 18.857821] bea0: ffffffbe1dadc240 0000000000000006 0000000000000001 ffffffc87b8e8000 [ 18.865633] bec0: ffffffc002246000 ffffffc002246ad0 ffffffc0022259c0 ffffffc87b8ebf60 [ 18.873445] bee0: ffffffc002228f40 ffffffc00078acf0 ffffffc0022c2000 0000000000000000 [ 18.881256] bf00: 0000000000000000 ffffffc87b8ebf40 [ 18.886110] [<ffffffc000083da8>] el1_irq+0x68/0xc0 [ 18.890885] [<ffffffc0000ca2e0>] default_idle_call+0x1c/0x30 [ 18.896527] [<ffffffc0000ca418>] cpu_startup_entry+0x124/0x1dc [ 18.902342] [<ffffffc00008cfcc>] secondary_start_kernel+0x11c/0x140 [ 18.908591] [<000000000008103c>] 0x8103c [ 18.912496] CPU1: stopping [ 18.915188] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G D 4.4.0 #78 [ 18.922305] Hardware name: ZynqMP ZCU102 RevB (DT) [ 18.927077] Call trace: [ 18.929511] [<ffffffc000087da8>] dump_backtrace+0x0/0x114 [ 18.934893] [<ffffffc000087ed0>] show_stack+0x14/0x1c [ 18.939927] [<ffffffc000393cf8>] dump_stack+0x84/0xa0 [ 18.944961] [<ffffffc00008d4cc>] handle_IPI+0x18c/0x1a0 [ 18.950168] [<ffffffc000080d28>] gic_handle_irq+0x9c/0xb4 [ 18.955550] Exception stack(0xffffffc87b8e3df0 to 0xffffffc87b8e3f10) [ 18.961974] 3de0: ffffffc87b8e0000 ffffffc002246000 [ 18.969794] 3e00: ffffffc87b8e3f40 ffffffc000084e70 0000000060000145 ffffffc002228f40 [ 18.977605] 3e20: 0000000000000000 0000000000000000 0000000000000001 0000000000000000 [ 18.985417] 3e40: 0000000000000000 000000001999999a 000cdfe600000000 00000000fffeed27 [ 18.993229] 3e60: 00000000fffeed28 ffffffc87b8e3eb0 00000000000006e0 ffffffc002246000 [ 19.001041] 3e80: 0000004000000000 ffffffc87b801128 000000000000000e ffffffc87b3de000 [ 19.008853] 3ea0: ffffffbe1daf58b0 0000000000000006 0000000000000001 ffffffc87b8e0000 [ 19.016665] 3ec0: ffffffc002246000 ffffffc002246ad0 ffffffc0022259c0 ffffffc87b8e3f60 [ 19.024477] 3ee0: ffffffc002228f40 ffffffc00078acf0 ffffffc0022c2000 0000000000000000 [ 19.032288] 3f00: 0000000000000000 ffffffc87b8e3f40 [ 19.037142] [<ffffffc000083da8>] el1_irq+0x68/0xc0 [ 19.041917] [<ffffffc0000ca2e0>] default_idle_call+0x1c/0x30 [ 19.047559] [<ffffffc0000ca418>] cpu_startup_entry+0x124/0x1dc [ 19.053374] [<ffffffc00008cfcc>] secondary_start_kernel+0x11c/0x140 [ 19.059623] [<000000000008103c>] 0x8103c [ 19.063529] ---[ end Kernel panic - not syncing: Fatal exception in interrupt This is my pl.dtsi: / { amba_pl: amba_pl { #address-cells = <2>; #size-cells = <2>; compatible = "simple-bus"; ranges ; axi_gpio_0: gpio@80000000 { #gpio-cells = <2>; #interrupt-cells = <2>; compatible = "xlnx,xps-gpio-1.00.a"; gpio-controller ; interrupt-controller ; interrupt-parent = <&gic>; interrupts = <0 89 1>; reg = <0x0 0x80000000 0x0 0x10000>; xlnx,all-inputs = <0x1>; xlnx,all-inputs-2 = <0x0>; xlnx,all-outputs = <0x0>; xlnx,all-outputs-2 = <0x0>; xlnx,dout-default = <0x00000000>; xlnx,dout-default-2 = <0x00000000>; xlnx,gpio-width = <0x8>; xlnx,gpio2-width = <0x20>; xlnx,interrupt-present = <0x1>; xlnx,is-dual = <0x0>; xlnx,tri-default = <0xFFFFFFFF>; xlnx,tri-default-2 = <0xFFFFFFFF>; }; gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; autorepeat; sw14 { label = "sw14"; gpios = <&axi_gpio_0 0 0>; linux,code = <108>; /* down */ gpio-key,wakeup; autorepeat; }; }; axi_gpio_1: gpio@80010000 { #gpio-cells = <2>; compatible = "xlnx,xps-gpio-1.00.a"; gpio-controller ; reg = <0x0 0x80010000 0x0 0x10000>; xlnx,all-inputs = <0x0>; xlnx,all-inputs-2 = <0x0>; xlnx,all-outputs = <0x1>; xlnx,all-outputs-2 = <0x0>; xlnx,dout-default = <0x00000000>; xlnx,dout-default-2 = <0x00000000>; xlnx,gpio-width = <0x8>; xlnx,gpio2-width = <0x20>; xlnx,interrupt-present = <0x0>; xlnx,is-dual = <0x0>; xlnx,tri-default = <0xFFFFFFFF>; xlnx,tri-default-2 = <0xFFFFFFFF>; }; gpio-leds { compatible = "gpio-leds"; led-ds23 { label = "led-ds23"; gpios = <&axi_gpio_1 0 0>; default-state = "on"; linux,default-trigger = "heartbeat"; }; }; }; };
  13. Hi, Im trying to catch an interrupt from an AXI GPIO switch from my board ZCU102. I have created the following design in Vivado: The design is validated so now im using Petalinux to boot linux. I have exported the .hdf file and built petalinux but i can't boot linux.It hangs after that: Exit from FSBL NOTICE: ATF running on XCZU9EG/silicon v1/RTL5.1 at 0xfffe5000 NOTICE: BL31: Secure code at 0xfffc0000 NOTICE: BL31: Non secure code at 0x8000000 NOTICE: BL31: v1.2(release): NOTICE: BL31: Built : 17:17:47, Dec 1 2016 [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 4.4.0 (tecnobit@TBL241) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #2 SMP Thu Dec 1 17:19:05 CET 2016 [ 0.000000] Boot CPU: AArch64 Processor [410fd034] [ 0.000000] earlycon: Early serial console at MMIO 0xff000000 (options '115200n8') [ 0.000000] bootconsole [uart0] enabled [ 0.000000] cma: Reserved 128 MiB at 0x0000000078000000 [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.0 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] PERCPU: Embedded 15 pages/cpu @ffffffc87ff71000 s23936 r8192 d29312 u61440 [ 0.000000] Detected VIPT I-cache on CPU0 [ 0.000000] CPU features: enabling workaround for ARM erratum 845719 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 1034240 [ 0.000000] Kernel command line: earlycon=cdns,mmio,0xFF000000,115200n8 [ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes) [ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes) [ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes) [ 0.000000] software IO TLB [mem 0x73fff000-0x77fff000] (64MB) mapped at [ffffffc073fff000-ffffffc077ffefff] [ 0.000000] Memory: 3908832K/4194304K available (7061K kernel code, 520K rwdata, 2692K rodata, 13604K init, 348K bss, 154400K reserved, 131072K cma-reserved) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vmalloc : 0xffffff8000000000 - 0xffffffbdffff0000 ( 247 GB) [ 0.000000] vmemmap : 0xffffffbe00000000 - 0xffffffbfc0000000 ( 7 GB maximum) [ 0.000000] 0xffffffbe00000000 - 0xffffffbe1dc00000 ( 476 MB actual) [ 0.000000] fixed : 0xffffffbffa7fd000 - 0xffffffbffac00000 ( 4108 KB) [ 0.000000] PCI I/O : 0xffffffbffae00000 - 0xffffffbffbe00000 ( 16 MB) [ 0.000000] modules : 0xffffffbffc000000 - 0xffffffc000000000 ( 64 MB) [ 0.000000] memory : 0xffffffc000000000 - 0xffffffc880000000 ( 34816 MB) [ 0.000000] .init : 0xffffffc000a07000 - 0xffffffc001750000 ( 13604 KB) [ 0.000000] .text : 0xffffffc000080000 - 0xffffffc000a06ff4 ( 9756 KB) [ 0.000000] .data : 0xffffffc001762000 - 0xffffffc0017e4360 ( 521 KB) [ 0.000000] Hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 64. [ 0.000000] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=4 [ 0.000000] NR_IRQS:64 nr_irqs:64 0 [ 0.000000] GIC: Using split EOI/Deactivate mode [ 0.000000] Architected cp15 timer(s) running at 100.00MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x171024e7e0, max_idle_ns: 440795205315 ns [ 0.000003] sched_clock: 56 bits at 100MHz, resolution 10ns, wraps every 4398046511100ns [ 0.008316] Console: colour dummy device 80x25 [ 0.012575] console [tty0] enabled [ 0.015942] bootconsole [uart0] disabled If i boot petalinux by qemu i manage boot linux, but the interrupt i defined in the design does not appear on the system I'm beggining with embedded linux so i don't know if i'm missing something. Any idea?? pl.dtsi zynqmp.dtsi pcw.dtsi system-top.dts system-conf.dtsi
  14. Hi, Following is the snippet from the device tree for the MicroZed Board. ps7-scugic@f8f01000 { #address-cells = <0x2>; #interrupt-cells = <0x3>; #size-cells = <0x1>; compatible = "arm,cortex-a9-gic", "arm,gic"; interrupt-controller; num_cpus = <0x2>; num_interrupts = <0x60>; reg = <0xf8f01000 0x1000 0xf8f00100 0x100>; xlnx,irq-f2p-mode = "REVERSE"; linux,phandle = <0x3>; phandle = <0x3>; }; Mine particular interest is the line that is bold in above snippet.Actually i am working on the Zedboard and when i generated the device tree for mine Zedboard then following is the Snippet:- ps7_scugic_0: ps7-scugic@f8f00100 { #address-cells = <2>; #interrupt-cells = <3>; #size-cells = <1>; compatible = "arm,cortex-a9-gic", "arm,gic"; interrupt-controller ; num_cpus = <2>; num_interrupts = <96>; reg = <0xF8F00100 256 0xF8F00100 0x100>; xlnx,irq-f2p-mode = "DIRECT"; } ; So it has become "DIRECT". So what is difference between "DIRECT" and "REVERSE",why for Microzed it is "REVERSE" and why for Zedboard it is "DIRECT". Please reply me. Regards Aditya