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Showing results for tags 'fpga zybo'.
I want to use PmodIOXP to allow both PmodAQS and PmodHYGRO to be connected into the same port in Zybo Z720. However, I do not know how to write my block design in Vivado since there is no IP for PmodIOXP in the vivado-library. Also, what kind of C++ code should I write in my Vitis after I exported my vivado file into Vitis
Hello, I am working on video processing using Z7-20 Pcam 5c, for this I have created an IP block which converts rgb image to hsv. Now, I want to filter it to obtain only the yellow color. So for this I am trying to use the hls::range function to threshold the pixels in the range of yellow color. As per the manual, the template is as follows: template<int ROWS, int COLS, int SRC_T, int DST_T, typename P_T> void hls::Range ( hls::Mat<ROWS, COLS, SRC_T>& src, hls::Mat<ROWS, COLS, DST_T>& dst, P_T start, P_T end); I want to understand what does ty