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Showing results for tags 'cmod a7-35t'.
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Hello everyone I am working on a project based on Microblaze, which I want to implement later on an FPGA circuit of type CmodA7-35t. My objective is to make the PFGA work under an external power supply and not with USB. I am now looking to find a solution to program the FPGA in Quad SPI Flash mode. On the Digilent references I found the following example: https://reference.digilentinc.com/learn/programmable-logic/tutorials/cmod-a7-programming-guide/start. My question is how I can do it from the SDK since the project includes BLOCK DESIGN in addition to a C application under SDK. I will be very grateful if someone can guide me or direct me to a tutorial. Thank you so much.
Hi, I have a brand new Digilent A7-35T board I tried to program via the USB built in JTAG using Vivado 2018.2. The part intermittently shows up in Hardware Manager, but a seconds later disconnects. Sometimes it disconnects just being connected (opened) in Hardware Manager and sometimes during programming. It is even worse if I try to erase and program the QSPI flash. I also downloaded and installed the latest Digilent Adept 2 with updated drivers and observed the same behavior. I tried different USB cables, different USB ports directly on my PC, via a powered hub, but the behavior is always the same -- it intermittently disconnects and fails. The amber LED does however stay lit. In Device Manager I am able to see the FTDI UART. I did also see it enumerate as a Microsoft BallPoint Mouse -- whatever that is. With this exact same setup, PC, Vivado, USB cables, etc, I have been programming the Zybo Z7-20 and the Arty boards with several designs without any such issues. Please let me know if I missed anything and what are the next steps in getting the board replaced or fixed. Thanks.
Dear All, I bought this board (I'm waiting to receive it) meantime I'm looking the electrical schematic and I've noticed about the clock frequency that IC4 (sheet 3/7 Rev B.1) should be a 100 MHz clock, also I can see a USB_12MHZ line that came into the GCLK line through a resistor R80, I kindly ask you if U4 is the predefinited source of clock of the FPGA and then R80 is not mounted into the board because I need to setup a design able to operate with a 50 MHz clock and if the supplied clock generator supplied with the board is 100 MHz I'm very happy. Could you please let me know more about this point? Thanks! Best regards Grinch