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Hello, I'm planning to produce a Pmod module for IEEE802.11ah (Wi-Fi HaLow). It supports both SPI and SDIO interfaces and I'm wondering if we can utilize SDIO with Pmod header just like existing PmodSD. It has some additional pins like /INT and /WAKE which I guess I can repurpose CD and WP pins.

Dear Digilent, First of all, I am running Windows 10 Pro 64Bit, Vivado 2020.2 Webpack and my hardware is the Pynq Z2. I am having the same issue as this guy. back then it was fixed for his version, but now i am trying it and i still get the same errors as him. Is there any newer version then the github one? Kind regards Luca.

Platform : PYNQ Z2 Add-on : Pmod CAN Software : Vivado (Vitis dev suite) Hi I am using Pmod CAN with a Pynq Z2, and when running the connection automation in Vivado I see that the two interrupts are not connected to the processor. My project works fine that way, but now, I want to use these interrupts as an input signal for a custom IP, which would take very precise timestamps for each frame received. I tried looking in the Pmod documentation to have details about these signals and how to use them, but unfortunately there are no information about it. Has anyone here ever used those interrupts and know how they work? Is there a documentation about it that i missed? My supposition is that SPI interrupt is activated when data is ready for SPI transfer, i.e. that a frame has been received, but I need to be sure. Thanks

Hello, I am setting up a radio amplifier for testing and need to send discrete signals to the amplifer and back to the software. I was successful doing this before with 1 PMOD RS485, however is there an alternate method to combine 4 PMODs together in such a way as to reduce distance? The daisy chain method would not work, seeing as how these are discrete signals, and the dimensions of the board require the PMODs to be spaced closer together. Is there any way to physically attach each PMOD to one another or any alternative to using these for testing discrete signaling? I reviewed all documentation, including the docs for the PMOD RS485 here & here but could not find anything to point me in the right direction. Is it possible to do this and combine multiple PMODS w/o using the daisy chain method outlined in the reference guide?

Hi, I am using the PMOD RS485 module with an FPGA and it seems like I cannot set the pin DE (Driver Enable) always high in half-duplex. It is sort of preventing me from acquiring signals through RXD. Is it because Y and A are connected together, as well as Z and B? Should I keep DE low unless I want to send data from the PMOD module? Thanks in advance.

Pmod OLEDrgb Demo not working on zybo z7 20. Oled is blank. Vivado 2023.1: no creating error Vitis 2021.1 : no error ubuntu 22.04.1 LTS Demo link: https://www.instructables.com/Getting-the-PmodOLEDrgb-to-Work-on-Zybo/

Hello! I am trying to use the DA2 Pmod on an Artix-7 FPGA Board, specifically the Nexys A7. The provided example FPGA code for the Pmod appears to be outdated (uses the discontinued X-Board and EPP module) and I am not sure how to use it. If anyone can provide some guidance on how to interface with the Pmod, that would be greatly appreciated!

Hello everyone, Selling my nexys 4 Board for $100, bought it for $350 PMODs sold seperately Ref: PMODs for sale: 1-Pmod OLEDrgb: 96 x 64 RGB OLED Display with 16-bit Color Resolution 1-Pmod ENC: Rotary Encoder 2-Pmod HB3: H-bridge Driver with Feedback Inputs 1-IR Infrared Obstacle Avoidance Sensor 1- Wifi Module 1- Motors 2-Small breadboards Wires, capacitors, resistors, 5V charger, logitech camera with USB Entire Bundle for $150 Please feel free to reach out for questions

Hello, I am trying to interface BMP280 sensor (in I2C mode) to Ultrazed EG-IO Carrier card + SOM. I connected BMP280 to one(JX1_JA_PMOD, 12pin) of 12 PMOD's available on the board. SCL and SDA pins of BMP are connected to pin 3,4 of JX1_JA_PMOD. I used AXI_IIC IP in vivado block design. Configured SCL frequency to 400 KHz in AXI_IIC IP. Bitstream generation was succesful and exported to Vitis SDK. Created a baremetal project on A-cores of Ultrascale+MPSoC (OS - standalone) BMP280 address is 0x76 and its operating voltage is 3.3V. Created an application to read the data in 0xD0 register of BMP280. I used the address offsets of AXI_IIC given in AXI_IIC 2.0 user guide. When I degbugged SCl and SDA lines in Vivado, no clock signal is observed on SCL and no data on SDA line. Data read is always 0. #include "xparameters.h" #include "xil_exception.h" #include "xtime_l.h" #include "xstatus.h" #include "xiic.h" #include <unistd.h> #include <xil_io.h> #define XPAR_IIC_0_BASEADDR 0x80000000 int main(void) { u32 i; u8 Buffer[255]; xil_printf("\n--------IIC INIT------\n"); Xil_Out32(XPAR_IIC_0_BASEADDR +0x100, 0x1); Xil_Out32(XPAR_IIC_0_BASEADDR +0x120, 0xF); Xil_Out32(XPAR_IIC_0_BASEADDR +0x108, 0x1EC); Xil_Out32(XPAR_IIC_0_BASEADDR +0x108, 0x0D0); Xil_Out32(XPAR_IIC_0_BASEADDR +0x108, 0x1ED); Xil_Out32(XPAR_IIC_0_BASEADDR +0x108, 0x201); for (i = 0 ; i< 1;i++) { Buffer[i] = Xil_In32(XPAR_IIC_0_BASEADDR + 0x10C); // Read data from RX FIFO usleep(15); } for (i = 0 ; i< 1;i++){xil_printf("mst rec 0x%0x\n\r", Buffer[i]);} return(0); } Here are my questions 1) I have attached screenshot of xdc file. Did I get the pin properties correct? 2) What is the reason that I can't observe SCL freq of 400 KHz when I debugged? Should I configure the SCLK frequency in Vitis? 3) Can I connect SCL and SDA of BMP280 to any PMOD GPIO pins? (except Vcc and Gnd) 4) Do I need to make changes to my code? Vivado block design, xdc file, debugged waveform and axi_iic block properties are attached

I am using Zynq ZC702 board for this project, also this is my first time using pmod sensor. getting this critical warning while adding ip: create_bd_cell -type ip -vlnv digilentinc.com:IP:PmodTMP3:1.0 PmodTMP3_0 CRITICAL WARNING: [BD 41-51] Could not find bus definition for the interface: Pmod_out CRITICAL WARNING: [BD 41-49] Could not find abstraction definition for the interface: Pmod_out endgroup Getting this error while applying external connection to the "pmod out" pin: ERROR: [BD 5-106] Arguments to the connect_bd_intf_net command cannot be empty. ERROR: [Common 17-39] 'connect_bd_intf_net' failed due to earlier errors. Do i need to individually out every single out pins or either the ip is not compatible with vivado 2016.1?

Hello, I am currently working with the Pmod MicroSD Card Slot, and am trying to interface it with the Zybo Z7 board (although I would ideally eventually interface it with the Spartan 7 SP701 Evaluation Kit). I discovered, while trying to use the PmodSD IP files in my block design, that the versions of Vivado I am using (Vivado 2021 & 2022) do not support the IP. When searching through the forums, I found other posters from a couple of years ago who encountered this issue as well. My question is: is this information still accurate (the IP is no longer supported), or have there been any new developments regarding support for this Pmod SD device? If not, would anyone happen to have any recommendations for resources to use while implementing SPI for the SD card (projects, guides, etc.)? Ultimately, I need to write values from the on-board XADC (1 MSPS) onto the SD card. I chose SD in particular because it allows for a fast stream of data (UART was too slow, and I need as high of a sampling rate as possible for a received signal). This XADC output data (stream of 12-bit values) will need to eventually be accessible by MATLAB for plotting and signal processing. I am still a beginner, so any recommendations would be greatly appreciated. Please let me know if I should provide any more information regarding my devices/constraints of the project. Thank you!

Hi, I am currently working on PmodGPS. I get to read the data from the serial port without any problem. And I would like to improve my accuracy further. I read on the datasheet there is something called RCTM using Differential GPS to enhance accuracy. However, according to the datasheet, it is inactive by default, I need to contact globaltop for detailed information. Yet, it seems the company no longer exists. Therefore, I was unable to contact them. Also, I am new to Differential GPS, so I am not sure exactly what kind of information I need to send to the IC. So my question is 1. How to enable the RTCM? 2. Is there any example or tutorial available? Thanks in advance. Sincerely, Jack Lu

As part of senior design I'm writing various scripts to interface with sensors through the AD2. We started out with some PMODs and want to move to other sensors, but I've hit a roadblock. I got the PMOD Color working fairly quickly and the script works perfectly, but I haven't goten any data output whatsoever to work for the PMOD CDC1. The initialize() function works properly and can detect de connected device ID, but once it enters the loop() function, every Read() call returns only 0 or an array of 0s, even though I'm able to read in the data via the master tab. I can reproduce this behavior if I immediately return the read data. Furthermore, if I let the script execute fully it reports that a timeout occurred, and not a single line of data is written to the csv file. I've attached the two scripts that I talk about. The one for the PMOD Color works perfectly, while the one for the PMOD CDC1 does not work past the initialize function. I set them both to run with the sensor tab's default parameters. pmod_cdc1.js.txt pmod_color.js.txt

Hi, this is my first try to interact with a chip, so please bear with me if my question is dumb. I'm using Basys3 with the pmod MIC3. The ADC gives back 4 leading zeros and 12 bits of data. I can get this out of pmod. But how to interpret this data? I understand the main principle of the ADC - I get a relative value between 0 and 2^12. The pmod's reference says that this value is representative of the volume and frequency. I assume that this is a kind of composite value, like X high bits are the frequency, and the rest are for volume, or similar - but couldn't find anything about such things. I was looking at all reference documentation and sample codes I could find, but maybe I was looking at wrong places. How do I get the volume and frequency separately out of the retrieved 12 bit value? Thanks

Hello, I'm new to this form, looking for some help with the Dual H bridge PMOD DHB1. I connected my power supplier to J4, my motors to J5 and J6. I have a custom IP that uses switches to drive motor speed with most significant bits of a duty cycle for PWM output at 2kz. I also have 2 switches connected to the DIR1 and DIR2 respectively. I also have button 3 connected to a reset condition to initialize code, inputs and outputs. To help debug, I connected the EN1 and EN2 output of the custom IP to the board LEDs to confirm that the signals are working correctly. I also checked the voltage at EN1 and appears to be doing what I expect. However, I do not have any motor actuation. I checked the voltage at the J4 = 8V, but neither J5 or J6 have any voltage differential between M+ and M-. I checked the sleep and fault pins they are both high, which is normal behavior as they are pulled low when in sleep or faulted state. Any advice on what I can do to find an issue would be appreciated. Thanks, Dave HBridgeTOP Hbridgecode (1)

Hello, I am trying to run the PMOD AD2 ADC with Basys3 FPGA, I made it work at 100khz and 400khz, but I want to use it in HIGH SPEED MODE as described in its manual, but I am having trouble with it, in the timing diagram, to begin the communication 1.the first data 0x08 is sent in fast mode to all slaves, does this mean that the frequency of SCL should be 400khz? 2. the second data, after the repeated start condition, is address i.e., 0x28 with write bit(0101000) in HIGH SPEED MODE, does it require to send the write bit, does HIGH SPEED here mean that the SCL frequency changed to 1.7Mhz (my intended HIGH SPEED FREQ)? 3. with no repeated start or stop condition(as per diagram, I could be wrong!), the 3rd data is address again with read bit, at 1.7 Mhz SCL ? 4. right after the ACK from slave, the master stretches the SCL signal (HIGH) for 2us, then the 1st byte of data is received from the slave 5. ACK from master then 2nd byte of data from slave, then NACK from master, then stop. one transaction complete. should i repeated this whole cycle every time i try to get data? or can we issue a repeated start condition after 2nd byte of data? Thanks

Hello, I'm trying to use PModOLEDrgb on a Zybo Z7-20 and run the basic Demo provided by the library but I have a problem with it. I follow all the steps indicated in the Getting Started guide (https://digilent.com/reference/learn/programmable-logic/tutorials/pmod-ips/start) but I still have problems. I'm using Vivado 2021.2 and until the board programming, all seem fine: I'm able to generate the bitstream, build the Platform and Application Project without errors. However, when I try to program the board an unexpected crash appears. The board is reset and I hear the classic Windows "cable reconnected sound". I did some tests with vivado-library takes from master branch and with vivado-library takes from last release (with the updated Makefiles) but the results are the same. In the pictures above there are my Block Design and my settings, I hope that they can help to understand where is the problem, maybe I missed some steps, or I have a wrong configuration. During my tests, I saw that the crash is somehow related to the function OLEDrgb_begin(). I surrounded the begin function with two xil_print to Debug the situation and only the first one is correctly visualized. If I comment the begin function the board and the "Done" Led stay on. I also supposed that the problem could be the hardware module, but I test it on my Arduino and it work. Could you help me solve this problem? In case, there is another guide to follow or some sample projects I could try on my board? Tell me if you need more information, I will provide you as soon as possible. Thanks and Best Regards.

Hi there! I'm an electrical engineering student and my group has been thrown in cold water: We have to do an SPI Project where we connect a PMOD-Mic3 to our Basys3 Board and measure the frequencies of sounds by giving the Mic signal out to the onboard LEDs. A lot of LEDs have to light up when the frequency is high (over 500 Hz) and less when the frequency gets lower. [We have to create a Vivado VHDL Project.] We have huge problems understanding the core of the exercise. So far, after hours of research, we were not succesful with anything but especially: Establishing SPI-Communication (Master-Slave) Creating working shift-registers Our question is: has anyone done anything like that and can provide us with tipps/tricks or even a working examplary code? We value copyright and would never copy your work, we just need an idea as we have never dealt with FPGAs, VHDL or SPI before. We would appreciate every answer, thank you all a lot in advance! Your ElectricalEngStudent :)

Hello, I am using a pmod gps module and corresponding IP in vivado on a zedboard. My project uses the pps pulse generated by the gps module for timing and internal sync not very relevant to the question. But I also want to connect the IP, is there any way of branching the signal from the auto generated interface made by the board specification? If not, as mentioned in this thread from 2018, making ports manually through the contraints file and paring those to pin pmod_out_pin(1-4)_t? I get errors when leaving pmod_out_pinX_o and _i not connected, should these be shorted to the _t pin/ground/vcc?

Hi, I'm trying to use the PMODs on the Cora Z7-10 to accept high-speed single ended signals from another board I am making. In the reference manual for this device it says: So my question is in regards to proper grounding here. If I have a pair JA1_P and JA1_N and want to use JA1_P as the single-ended input. It says I should drive JA1_N low on in the FPGA fabric, but do I also need to connect the output of that to ground (it kind of seems like I should)? I'm perhaps a little worried about ground spikes, so if I do, should I put a series resistor in with it? Will this affect the single-ended speed potential? My data rate is ~500Mbps on each line.

Hi, I am trying to make a project where I can receive a digital data and store it in DDR memory, I want to ask how can I connect one of the HP PMOD port let say JC on Zyboz7 board with an external source ? Thanks

Hi i'm using Vivado 2018.2 + Zedboard, my goal is to use the WiFiScan from the examples attached to Pmod WiFi folder. i have build the project in vivado section and exported it to SDK at that point i'm creating new application project, choose C++ project and select finish. i'm getting the following errors: flexible array member 'DHCPDG_T::options' not at end of 'struct DHCPMEM_T' DHCP.h ‪/proj_bsp/ps7_cortexa9_0/include/DEIPcK/utility‬ line 216 C/C++ Problem flexible array member 'DHCPDG_T::options' not at end of 'struct DHCPMEM_T' DHCP.h ‪/proj_bsp/ps7_cortexa9_0/libsrc/PmodWIFI_v1_0/src/DEIPcK/utility‬ line 216 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'class TCPSocket' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/include/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'class TCPSocket' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/libsrc/PmodWIFI_v1_0/src/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'class UDPSocket' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/include/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'class UDPSocket' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/libsrc/PmodWIFI_v1_0/src/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'struct DNSMEM_T' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/include/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'struct DNSMEM_T' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/libsrc/PmodWIFI_v1_0/src/DEIPcK/utility‬ line 145 C/C++ Problem thanks for the help

Greetings, I am trying to run the example code of SD PMOD on my Nexys4 DDR FPGA. I followed the tutorial to generate the hardware but when I move to Vitis and try to compile SD card example, it throws me the following error message: Checking for BSP changes to sync application flags for project 'sd_app'... 15:49:33 ERROR : Failed to openhw "/home/pmod_sd_wrapper/export/pmod_sd_wrapper/hw/pmod_sd_wrapper.xsa" Reason: ERROR: [Common 17-39] 'hsi::open_hw_design' failed due to earlier errors. 15:49:33 ERROR : Failed to update application flags from BSP for 'sd_app'. Reason: null I have seen other people having the same issue at other posts. The offered solution was to use Vivado/Vitis 2019 but unfortunately that's not possible for me. Is there any other workaround? PS: I used the vivado project provided at this post.

I followed this forum and changed the constraint files of the Zybo Z720 in Vivado and successfully generate bitstream and the xsa file to import into Vitis. https://forum.digilentinc.com/topic/8943-pmod-as-input-and-output-gpio/ #Pmod Header JE set_property -dict { PACKAGE_PIN V12 IOSTANDARD LVCMOS33 } [get_ports { je_pin1_io }]; set_property -dict { PACKAGE_PIN W16 IOSTANDARD LVCMOS33 } [get_ports { je_pin2_io }]; set_property -dict { PACKAGE_PIN J15 IOSTANDARD LVCMOS33 } [get_ports { je_pin3_io }]; set_property -dict { PACKAGE_PIN H15 IOSTANDARD LVCMOS33 } [get_ports { je_pin4_io }]; set_property -dict { PACKAGE_PIN V13 IOSTANDARD LVCMOS33 } [get_ports { je_pin7_io }]; set_property -dict { PACKAGE_PIN U17 IOSTANDARD LVCMOS33 } [get_ports { je_pin8_io }]; set_property -dict { PACKAGE_PIN T17 IOSTANDARD LVCMOS33 } [get_ports { je_pin9_io }]; set_property -dict { PACKAGE_PIN Y17 IOSTANDARD LVCMOS33 } [get_ports { je_pin10_io }]; I am able to control the GPIO pins of port JF on the Zybo Z720 using the following code, how do I edit this so that I am able to turn on/off LEDs using the Pmod port JE instead. #include "xil_cache.h" #include "xparameters.h" #include "stdio.h" #include "xparameters.h" #include "xuartps.h" #include "xtime_l.h" #include "xgpiops.h" #include "sleep.h" #include "xil_io.h" #include "xil_types.h" #include "xil_printf.h" #include "sleep.h" #include "stdlib.h" #include "string.h" #define HOST_UART_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID #define HostUart XUartPs #define HostUart_Config XUartPs_Config #define HostUart_CfgInitialize XUartPs_CfgInitialize #define HostUart_LookupConfig XUartPs_LookupConfig #define HostUart_Recv XUartPs_Recv #define HostUartConfig_GetBaseAddr(CfgPtr) (CfgPtr->BaseAddress) #define PMODESP32_UART_BASEADDR XPAR_PMODESP32_0_AXI_LITE_UART_BASEADDR #define PMODESP32_GPIO_BASEADDR XPAR_PMODESP32_0_AXI_LITE_GPIO_BASEADDR #define COUNTS_PER_SECOND (XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ /2) #define TIMER_FREQ_HZ 100000000 #define MAX_WIDTH 320 #define MAX_HEIGHT 240 #define MAX_BUTTON 16 #ifdef __MICROBLAZE__ #define HOST_UART_DEVICE_ID XPAR_AXI_UARTLITE_0_BASEADDR #define HostUart XUartLite #define HostUart_Config XUartLite_Config #define HostUart_CfgInitialize XUartLite_CfgInitialize #define HostUart_LookupConfig XUartLite_LookupConfig #define HostUart_Recv XUartLite_Recv #define HostUartConfig_GetBaseAddr(CfgPtr) (CfgPtr->RegBaseAddr) #include "xuartlite.h" #include "xil_cache.h" #else #define HOST_UART_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID #define HostUart XUartPs #define HostUart_Config XUartPs_Config #define HostUart_CfgInitialize XUartPs_CfgInitialize #define HostUart_LookupConfig XUartPs_LookupConfig #define HostUart_Recv XUartPs_Recv #define HostUartConfig_GetBaseAddr(CfgPtr) (CfgPtr->BaseAddress) #include "xuartps.h" #endif #define PMODESP32_UART_BASEADDR XPAR_PMODESP32_0_AXI_LITE_UART_BASEADDR #define PMODESP32_GPIO_BASEADDR XPAR_PMODESP32_0_AXI_LITE_GPIO_BASEADDR #define BLOCK_SIZE 40 void startup(); XGpioPs_Config *ConfigPtr; XGpioPs output; int main() { startup(); while(1) { XGpioPs_WritePin(&output, 13, 1); //led on (pin 1,2,3,4) XGpioPs_WritePin(&output, 10, 1); XGpioPs_WritePin(&output, 11, 1); XGpioPs_WritePin(&output, 12, 1); } void startup(){ //initialize pins for JF ConfigPtr = XGpioPs_LookupConfig(XPAR_PS7_GPIO_0_DEVICE_ID); XGpioPs_CfgInitialize(&output, ConfigPtr, ConfigPtr->BaseAddr); XGpioPs_SetDirectionPin(&output, 13, 1); XGpioPs_SetOutputEnablePin(&output, 13,1); //pin1 JF1 XGpioPs_SetDirectionPin(&output, 10, 1); XGpioPs_SetOutputEnablePin(&output, 10,1); //pin2 JF2 XGpioPs_SetDirectionPin(&output, 11, 1); XGpioPs_SetOutputEnablePin(&output, 11,1); //pin3 JF3 XGpioPs_SetDirectionPin(&output, 12, 1); XGpioPs_SetOutputEnablePin(&output, 12,1); //pin4 JF4 }

Hello, Is there a product to connect all pins included in a female PMOD to a breadboard, so they can be accessed individually on the breadboard. thank you, Dan