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Found 211 results

  1. I recently purchased the PmodMIC to use with my Nexys 3 board and Analog Discovery. Finally after a bit of coding, I seem to have gotten it to run continuously, but I have just a few questions. In the PmodMIC reference component PDF, it states: The VHDL component is an entity named PmodMicRefComp which has five inputs and five outputs.The input ports are a 50MHz clock,.... (BTW, I think the 5 inputs, 5 outputs thing is a typo ). But my first question is: 1) Is it possible to lower the sampling rate? Apparently the 50 MHz input clock gets divided down to 12.5 MHz inside the PmodMICRefComp. I need to record some audio data, but certainly not at 12.5 MHz! I am not sure why any audio source would ever need to be sampled that quickly, but in any case, I attempted to lower the input clock speed down a bit and my design seems to have failed. I am looking to record signals comprised mainly of human speech, so 8KHz is actually about what I need. The 2nd question is: 2) I see no mention anywhere of the format of the data output by the PmodMIC. It's 12 bits in parallel, but is that signed? unsigned? Couldn't seem to find this in the reference PDF anywhere. If this is an SPI standard convention that I'm just not aware of, sorry for asking. The 3nd question is: 3) In the state machine diagram, is there no transition directly from the "SyncData" state to the "ShiftIn" state? My code currently initiates continuous sampling by checking if nCS is HIGH and DONE is low, as indicated in the SyncData state. Then, it brings the START signal low again to return to the IDLE state, and increments a counter to keep track of the number of samples taken. On the next clock cycle, it checks if START is low, and # of samples is > 1, then pull START highagain, repeating the process. What I am wondering is: Instead of pulling START low to return to IDLE, would it not just be possible to keep START high and have nCS get pulled low again? I suppose this would need to be taken care of by the PmodMICRefComp VHDL code since that is the driver for the nCS signal after all. It would be nice if that provided VHDL component had a single bit control signal that allowed for selecting ONE TIME conversion and CONTINUOUS conversion. Thanks for taking the time to read this.
  2. Using the PmodOLED and the chipKIT Cmod-- I was able to make the file work on my work-Windows PC I downloaded the newest file from the webpage (thanks to previous post:) and got the library into my sketchbook folder. However, when I tried to compile on my home MacBook, I kept getting this error: Uninstall, reinstall MPIDE. Delete all libraries. Reinstall it again. Then, went to the MPIDE Icon, held down Control+ click and went to "Show Package Contents" Which then I navigated to Contents->MacOSX>Resources>Java>Hardware>pic32>compiler>pic32-tools>include>sys Screen Shot 2015-01-28 at 9.39.48 PM by laraswanland, on Flickr ... and verified that the file was there. Screen Shot 2015-01-28 at 9.41.55 PM by laraswanland, on Flickr ... I reopened MPIDE Opened the OLED Demo Example Hit Verify... Same irritating error. So I grabbed the sysattribs.h: and put it into my search bar. and came up with the file OLEDDriver.cpp that had it directly referenced. Screen Shot 2015-01-28 at 9.34.08 PM by laraswanland, on Flickr ... Opened the file up + found sysattribs.h and it was oddly the only include with a directory slash... <sysattribs.h> Screen Shot 2015-01-28 at 9.32.36 PM by laraswanland, on Flickr Tried a few things, but it turns out if you switch the direction of the slash... and hit save... the file will compile. <sys/attribs.h> Screen Shot 2015-01-28 at 9.33.12 PM by laraswanland, on Flickr Screen Shot 2015-01-28 at 9.32.49 PM by laraswanland, on Flickr So change the <sysattribs.h> to <sys/attribs.h> My thoughts is that there may be a weird syntax that Windows uses that can use the forward-slash, but Mac (and maybe Linux) can't use it? Is this something other people have noticed?
  3. Hi, I'm about to buy the PmodIA board. I'm wondering where can I get the probes for the board? Thank you.
  4. larvar


    Hi I have found some references to the PmodIA based on AD5933 Impedance Analyzer Chip (pic attached) but it doesn't seem to be available for purchase. Is it discontinued? Or coming soon? Anybody have one they'd like to sell? Thanks
  5. I just got this up and running: It's a custom TFT LCD controller board using only two PMODs. The board controlling it is an FPGA devboard that communicates with the host computer using the FTDI's FT2232H in synchronous FIFO mode so that I can transfer data between the host and board at a rate of about 25MB/s using a simple protocol. I wrote a scripting tool that glues together wishbone cores to create an FPGA image using a simple configuration file. Editing configuration files are great but I thought it would be so much better if I could modify the FPGA image by using a GUI so I worked on an application that does that. Here is a screen shot of how I visually created the LCD controller. One of the big limitations of using USB 2.0 is the relatively large overhead to initiate a transaction, It's much faster if you send a large chunk of data. So instead of writing directly to the LCD controller I write to the SDRAM and then configure the LCD controller to read directly from the memory. This way I can write a new frame down to memory while the LCD controller is reading data out using a double buffer scheme (host writes to back, controller reads from front, then flip). The protocol to communicate with the FPGA is a really simple protocol abstracted away in Python to simply 'read' and 'write'. It was pretty cool to communicate with the FPGA using a python module but I thought it would be so much better if I could interface with an FPGA using a GUI. So I added a visual interface to communicate with it (That's what I was using in the video). If you're interested in the board here's the link: the code to control the LCD is here: The code is designed to be as generic as possible, so if you want to adapt it to your project it really just needs a wishbone bus but you can bypass Wishbone by just using the nh_lcd.v
  6. Hello again I was looking at doing a servo project and bought a GWS-S03N servo motor and the HB3 PMOD. Looking at various sites, I have not seen anyone using the HB3 to control a servo. Is the only purpose of the HB3 to allow higher voltages to the servo motor than the Basys2 can output? It appears that pulse control is still coming directly from the FPGA board. So, if I used a higher voltage to the PMOD and motor, is there any chance of damaging the FPGA by connecting it directly to the control line of the servo? Is the HB3 more (or only) intended for driving standard DC motors and not servo motors? thanks
  7. Hi all, I am a newbie into the world of FPGAs and HDLs. I am currently taking a logic design course where I am required to present a project by the end of this year. I would like to buy either a Basys3 or a Nexys4 board, but I am unsure as to how I could interface any of these boards with other external components, such as sound sensors, servos, (another development board perhaps?), and so on. Please, try not to consider Pmods, as they are somewhat expensive to my budget for now. Your help is greatly appreciated.
  8. Here's a question I have from a customer: I´am using the PMOD TMP3 – Sensor and i want du create a connector for all pins on the board. Are you able to give me a surveying-sheet of the pin distances or the geometrical arrangement? Can anyone help?
  9. A customer asked me this question: hi I'm facing a problem while using DIGILENT BASYS2 SPARTEN 3E board. How can a sonar unit(external hardware) giving digital output pulses can be connected to the pmods. How are the 4 pmods in the board connected. With thanks and regards Aparna
  10. Hi guys, I'm using the with the pulse width signal. What's the output impedance of this pin? Is there a schematic of this sensor available? Best regards, Martin
  11. asmao

    PMOD as GPIO

    Hello, I'm currently using a Nexys 4 board and I would like to serially output and receive data. I was wondering if this could be done through a PMOD port? If so, how? Inside of my HDL design (I'm using Vivado 2014.2 and my HDL is in verilog) I'm asserting various PMOD ports yet whenever I try to measure the outputs I got nothing. My HDL looks something like this:assign JC1 = 1, JC2 = 0; Both JC1 and JC2 measure to 0. I've also tried the alternative names listed in the schematics (K2 and E7) as well as other PMOD interfaces. If I can't use the PMOD ports in this fashion, I was hoping to hear any suggestions? Thanks,Alvin