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Found 180 results

  1. Dear Digilent team, I am trying to start a PmodOLEDrgb on a SP601 development kit. Thus, as I far as I can read in your docs, it looks like I have to program a microblaze in my spartan 6 and implement a SPI line for this device I have two questions : 1/ Is it possible to program a SPI line driver in pure VHDL to drive this PMOD ? (I believe it would be huge amount of work to get it work when I look at the 32 steps only to start the Pmod!!) 2/ Do you have a project example with a microblaze instead of a zynq to test with my SP601 board ? Thank you and best regards, Olivier Goudard Power Electronics Engineer The European Synchroton - ESRF GRENOBLE, FRANCE
  2. Is there a CAD model available for the Pmod shield? I'm using it with the Arty board (for which I do have the CAD model), and would like to incorporate both into an assembly so I can create a case. thanks! https://reference.digilentinc.com/reference/add-ons/pmod-shield/start
  3. Hi all! I'm currently thinking of purchasing the pynq-z1 board and hoping to set up CAN communication on it. I've read the documents regarding the PYNQ board (http://pynq.readthedocs.io) but I wasn't able to conclude on whether I would need to purchase a PMOD with it to access a CAN peripheral. From what I understood, many of the peripherals are available through the PL via PMODs or an arduino. There was also a comment stating that peripherals such as Ethernet, USB and UART, are connected externally, while all other peripherals are connected internally or routed to PL pins. This confused me so my questions are: What do you mean by "connecting peripherals internally"? and would I need to purchase a PMOD and route my CAN controller to PMOD pins, in order to interface with CAN? (via overlays, I believe?). Just need some confirmation! I'm sorry if I'm asking something so basic, I'm fairly new to embedded development, especially with zynq chips but I'm keen to learn as I go! -Vin
  4. Hi what sort of connector cable can be used to connect afe5809 adc board to arty fpga board.
  5. Hello, some people might already know The PoC-Library. It's a collection of over 120 free and open source IP cores, that are platform independent. The IP core work on Altera, Intel, Lattice and Xilinx FPGAs of any device family. The core are describe in platform independent, generic VHDL code. If vendor primitives are required or better implementations can be achieved, a configuration mechanism will select a suitable implementation. PoC has gotten a first simple set of new I/O controllers abstracting Digilent's Pmods. These are located here: https://github.com/VLSI-EDA/PoC/tree/master/src/io/pmod I might wonder if users in this forum or Digilent itself would be interested to add more Pmod abstraction layers for modules like the temperature sensor, OLED displays, ... I'm going to release a set of basic I/O controllers for I²C, OW and SPI soon. These can then be used as a communication base for higher level protocol implementations to the Pmods. If one is interested or has questions, please let me know. You can contact me e.g. via Gitter: https://gitter.im/Paebbels Kind regards Patrick Lehmann
  6. i want to generate sine wave on dac (pmodda3)(http://www.analog.com/media/en/technical-documentation/data-sheets/AD5541A.pdf)and i am using spartan3e but there ara several warnings ,How can i fix the warnings? i loaded code and picture. help me please ---------------------------------------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.ALL; use ieee.std_logic_arith.all; use ieee.std_logic_signed.all; use ieee.numeric_std.all; entity kecelikalem is port( clk: in STD_LOGIC; reset : in STD_LOGIC; din:out std_logic; ldac:out std_logic:='1'; cs :out std_logic:='1'; sclk :out std_logic:='1'); end kecelikalem; architecture Behavioral of kecelikalem is signal a:integer range 0 to 3:=0; signal i : integer range 0 to 18:=0; type veri is array (2 downto 0) of std_logic_vector(15 downto 0); signal sine :veri:=("1100000000100000","0000000000001111","1100000000000000"); --signal sine :std_logic_vector(15 downto 0):="1100000000000011"; signal data :std_logic_vector(15 downto 0); signal temporal: STD_LOGIC; signal counter : integer range 0 to 124999 := 0; begin frequency_divider: process (reset, clk) begin if (reset = '1') then temporal <= '0'; counter <= 0; elsif rising_edge(clk) then if (counter = 124999) then temporal <= NOT(temporal); counter <= 0; else counter <= counter + 1; end if; end if; end process; sclk <= temporal; process (temporal) begin if falling_edge(temporal) then if(a=3) then a<=0; else data<=sine(a); if (i=18) then a<=a+1; ldac<='1'; i<=0; else if (i=17) then ldac <='0'; else if (i=16) then cs<='1'; ldac <='1'; else cs<='0'; din<=data(i); --din<=sine(i); ldac <='1'; end if ; end if; end if ; i<=i+1; end if; end if; end process; end Behavioral;
  7. Hi I'm trying to transmit digital signals through a cable. In orther to avoid noise, I am using a differential output (LVDS) to transmit the information from the FPGA to a Cable. At the end of the cable, I'm using a converter to convert the differential signal to a single-end signal (LVDS to Single End converter). For that I need to feed my converter circuit through pin 6 of pmod connector (pin6 = vcc pin = 3.3V). Initially everything was working properly. However the other day, I switched on the board again (Atlys Board) and checked that I no longer have vcc on pin 6 (pin6 = vcc pin = 0V). Can anyone explain what's going on? Is the board damaged?
  8. ZYLL

    Ask for help about Pmod I/O

    Hi, I need help about Pmod I/O. I have a Zedboard and I use GPIO to control some pmod pins to output voltage signal. I use SDK and c language to achieve it, but it seems like that the each time I use "XGpio_DiscreteWrite" it cost me more than 0.1 microsecond, i.e., it changes voltage with frequency much less than 10MHz. This is really slow comparing to its clock frequency. I have noticed that in the embed topic there are arguments about PS, PL side but I have totally no idea about how to improve the performance. On the other hand, I also need to use another pmod pin to "trigger" my board, i.e., when I send a high voltage to the pmod pin, the program started to work. It's really similar to the interrupt example in the tutorial, but I still cannot achieve it. Thanks for your help!
  9. Hello, I am trying to avoid all of those SPI commands with higher level abstractions. The low-level example seems to help, but it is incomplete. It doesn't show how to setup or toggle the slave select lines. I presume this is done automatically, but I want manual control. I cannot find information on MicroBlaze registers. For example, let's look at XSpi_SetSlaveSelect. This is all I could find: file:///C:/Xilinx/SDK/2016.2/data/embeddedsw/XilinxProcessorIPLib/drivers/spi_v4_2/doc/html/api/group__spi__v4__1.html#ga162523a3e9b29f063701db303ac8cf17 . It's not very clear, or correct. Let me explain. I only have one slave: here is my constraint file for the SPI signals: set_property -dict { PACKAGE_PIN G17 IOSTANDARD LVCMOS33 } [get_ports { spi_0_ss_io[0] }]; #CS #IO_L5N_T0_D07_14 Sch=ja[1] set_property -dict { PACKAGE_PIN G19 IOSTANDARD LVCMOS33 } [get_ports { spi_0_io0_io }]; #MOSI #IO_L4N_T0_D05_14 Sch=ja[2] set_property -dict { PACKAGE_PIN N18 IOSTANDARD LVCMOS33 } [get_ports { spi_0_io1_io }]; #MISO #IO_L9P_T1_DQS_14 Sch=ja[3] set_property -dict { PACKAGE_PIN L18 IOSTANDARD LVCMOS33 } [get_ports { spi_0_sck_io }]; #SCK #IO_L8P_T1_D11_14 Sch=ja[4] I am using the CMOD-A7 module.These are pins on the PMOD connector. My slave select is on JA-1, as you can see. Let me demonstrate with a code snippet: while(1) { XSpi_SetSlaveSelect ( XPAR_SPI_0_BASEADDR, (u32)0x01); // This should have set my SS[0] pin to 1. It doesn't. wait a time delay XSpi_SetSlaveSelect ( XPAR_SPI_0_BASEADDR, (u32)0x00); // This should have set my SS[0] pin to 0. It's always 0, so I don't know if this worked or not. wait a time delay } This should just toggle the pin, but it doesn't. Can someone please provide a simple SPI example that is only 1 level deep (in file hierarchy)? Please include example that sets up the SPI to use the correct slave pin, and then toggles it. I included my main project file. This was originally from the Polled SPI example project, "xspi_polled_example.c", so everything else was generated by SDK. If you create a basic project with an SPI port, then you can just replace the contents of that file with that of this file and it will compile. Thank you, Richard V Temp.c
  10. Hi everyone I work for car seating company in the UK and we are having an issue with our operators not fitting a specific set of screws. There for I took on the project of making an inductive pen which the operators would need to use in their process to check if the screws are present. However this presented another issue that the operators would then proceed to use the inductive not on the screws but on another piece of metal which they would just tap 4 times to cheat the test. This has led me to find out if it would be possible to develop a positioning system that detects where the pen is and will only let the pen activate once in four different locations to ensure that its detecting the screws and not some other piece of metal. so what products from diligent would allow me to detect position and only allow the inductive pen to activate in specific positions via PLC. I don't have much knowledge on this topic as I've only been an apprentice engineer for 8 months so explanations are very much welcome. below I have attached a very very simple diagram of the setup we have for the inductive pen including the 4 positions it'd need to locate. thanks, Joel
  11. Hi, I have been working on a PMOD TFT LCD that can be used to play video directly from the FPGA using only two PMODs. I designed the hardware a couple of years ago but recently I had to do a project where I needed to use the Vivado block diagram interface. I thought it was pretty cool how fast it was to put a design together so I went about making an IP Core that controlled the PMOD. It has an AXI Lite interface used to initialize the LCD and then a AXI Stream interface that can be connected directly to a VDMA core. I ended up making three different demos including the following: Using the Microblaze to write directly to the screen. I wrote another core that behaves like a console output that will write directly to the screen for you so the MCU doesn't need to write the console stuff to the screen. I streamed video. Unfortunately this was harder than I expected and had to use the Pynq board instead. Here's a video of it working. I wrote a project page on hackaday.io with more details https://hackaday.io/project/25333-pmod-tft-board I was thinking of trying to sell the boards but I didn't know if there would be any interest. Dave
  12. Hi, I'm going to buy Pmod USBUART: USB to UART Interface for MicroZed board I have. Would I need a UART Crossover Cable for it? Also, is there any example I could use to have this PMOD working? Any help is greatly appreciated! Thanks a lot!
  13. Greetings! I am using an Arty board (xc7a35ticsg324-1L), and I want to receive an external clock signal which comes from a signal generator. To receive this signal, the Arty board needs a SMA connector, and I recall the Pmod AD5 has two of them: http://store.digilentinc.com/pmod-ad5-4-channel-4-8-khz-24-bit-a-d-converter/ Could the Pmod AD5 be a good choice for my purpose? What would you recommend me? Thanks Fields
  14. Hello! Recently I bought a PMOD AD5 board to hook it up with my Arduino DUE in order to measure AC Voltage. In terms of libraries, I tried two - the official AD7193 library and the AD Converter one, from GitHub. The AD Converter one seems like it's based on the official DSP library from your wiki, but adapted to Arduino. With that one, I had a few problems, so I went with the other one. For starters, I have my signal connected to AIN3 and GND connected to AIN4 (both on J2). The SPI is properly connected to my DUE, settings are SPI_MODE3 and SPI_CLOCK_DIV32 (initially it was DIV16, but I decided to try 32 as well, unfortunately to no avail). I am powering up everything from the 3.3V pin on the DUE and my signal is 50 Hz sine wave, with a 1.65V reference. I am measuring it with normal differential type, not the pseudo type (even though I tried that). Originally, with the default library, I could measure the 1.65V, but the sine wave isn't there (because of the 50Hz/60Hz rejection filter). Trying out different things with the mode and configuration registers from the AD7193 datasheet, I tried to set it up the following way: Chop Disabled, SYNC4 (and SYNC3 afterwards), FS=1; which from the datasheet it said that the 50Hz and 60Hz rejection would be disabled. I tried a whole lot of things, but I just couldn't get the filter turned off. Reason I am writing this is that I am hoping someone here can help me with my dilema and give me the means of measuring AC Voltage, because the ADC is great. Here are my register values: Mode - 0x080001 Configuration - 0x000208 I got these register values from the AD719X AFM Simulation Software. Running this configuration there, with 5MHz of the SCLK generates the Frequency diagram exactly as I need it. But for some reason, with the Arduino library, that just doesn't want to work. Thank you a lot for reading and I'm hoping someone can help.
  15. I'm trying to the Pmod RS485 as a RS-422 interface. In your datasheet, you reference 4 ports. A-input and B-input, which I assume is the Rx; and Y-output and Z-output, which I assume is the Tx. Do you specify which terminal is positive and which one is negative or does it not matter? I appreciate any support you can provide. Thanks.
  16. Hi, I have loaded a Linaro Ubuntu on the Zedboard using Vivado 2016.2 and I want to extract the CoreSight trace data off the board. By applying the same idea suggested in the link http://blog.idv-tech.com/2014/03/22/howto-export-zynq-peripheralsi2c-spi-uart-and-etc-to-pmod-connectors-of-zedboard-using-vivado-2013-4/ , I enabled CoreSight component in the block customization of the Zynq PS, mapped its IO to EMIO, made the TRACE_0 external, and changed my .XDC file to map the 8-bit output data to the JA1 PMOD data pins. However, I'm not sure with my next step. When I powered on my board and tried to use Tera Term to monitor the Pmod port, Tera Term cannot even detect the COM port. So what I'm missing here? It seems that it is not as straightforward as just plug-in-and-use. Do I need some specific IP core or write a driver in the OS to make this work? I think what I want to do is just to offload some data through the PL-side Pmod and monitor it using Tera Term. I believe this can be done without much pain. So is there tutorial outside for that? Thanks in advance. P.S. Does Digilent provide any Pmod-to-USB converter which supports 2x6 pinouts? If yes, can anyone provide a link for that?
  17. Hello dear We are students whom are working on an IoT project. We want to use the Pmod Hygro to get the temperature and humidity. We also use the Artik530 by Samsung platform, with the Arm processor which supports the I2C protocol. When we try to use the example code given by the resource center of this sensor, we get the error which can be seen in the added file . in addition, we also get a temperature and humidity reading ,but the values are not making sense nor changing as the temperature and humidity are changing. Can you please help us finding what's the problem? or where is the function that prints this error. Thanks in advance, Yoav.
  18. Hello to everyone, I want to show the temperature data with Teraterm . I get from PMOD TMP3 . But I have to design the PMOD TMP3 IP and I do not know what is the difference with led_ip_design on the link there. https://forums.xilinx.com/xlnx/attachments/xlnx/gendis/16930/1/adding ip.pdf Can you help me? How can I show the temperature data?
  19. Hi, I have pmod gps receiver, and I connected it to my zybo board using pmod. I would like to get data from it but it can't connect to the satelite. I have petalinux on arm processor so I execute cat < /dev/ttyPS1 and I receive the gps module output but fields like position etc. are empty. The green led is still blinking. I am waiting about 30minutes and I still have the same problem. What have I do to run it correctly
  20. I made a order with a FPGA board and some pmods and the shipping was about 20 bucks, later down the road if i decided to buy more Pmods for my board, will I still be charged 20 for shipping even if i order only 10 bucks worth of Pmods? I did a checkout without confirming and it still wanted to charge me 20+ bucks for shipping. if that's correct i'd have to save up a lot more and buy a big bundle of Pmods to justify the cost of shipping seeing that it's the same for 1 Pmod or 10 Pmods. correct me if im wrong.
  21. PS/2 interface makes random data from the keyboard when using dev board power, does nothing when using external 5V, tried different keyboards, tried different connectors. Please advise.
  22. I'm using DA4 and OD1 PMod boards in a project. We will have quite a few add-on boards in the device, and I want to get placement nailed down. Is it possible to get a 3D CAD model (.step, .iges, etc.) for them? Many Thanks, -Sberry
  23. Hi everyone; I want to build a real-time control system using the Zedboard. I want to connect the board using the Pmod modules to the actuator and the sensor, and I want to ask you if it is a good idea to do it throught the Simulink HDL Coder. So, My first question is: is it possible to interface the Pmod AD/DA with the board using simulink coder? And how? I did it in Vivado in VHDL but now I want to build the overall system in Simulink and I don't have idea how to do it. Thank you so much. Paolo
  24. Hello All, I tried the program given in http://hamsterworks.co.nz/mediawiki/index.php/Pmodi2s but there is no output on the SD. I have simulated the clock with 100MHz and got these values. clk 10ns 100Mhz Sclk 1.56Mhz mclk 40ns 25Mhz SD is always zero in-spite of setting the input data_l and data_r as Ones as shown in picture and simulation output files. I am unable to find the cause for the problem. Am i missing anything in testbench code, as I am simulating only CLK ? What changes are to be made in that code if i have to use internal SCLK. I have a PCB in which is spartan 6 FPGA is hardwired to CS4344, leaving SCLK as open/NC. I tried commenting SCLK signals and ran program but it didnt help either. Kindly help to resolve. Thanks in advance. Kotresh Kumar isim for i2s.wcfg
  25. Hello I am new to FPGAs, and I'm using Pmods AD1 and DA2 in a control application on ZedBoard, using VIVADO and SDK. Is there any tutorial or hint to know how to start the design and interfacing between ZedBoard and these pmods. Thanks. Elie.