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Found 338 results

  1. tekson

    Delay

    Hi all, How to implent delay in verilog code? I want to run a led blink code with one second delay using zynq zybo-7-z10 Thanks in advance
  2. Hi all, I m beginner in Fpga, actually i dont know anything in FPGA. Last week I bought a zybo z7-10 board from diligent store. I want to run a linux on this borad, for that i did everything as per the tutorial link:http://www.instructables.com/id/Setting-up-the-Zybot-Software/ And i installed linario in the sdcard. I only have a VGA monitor to connect to zybo, so that i used a vga to hdmi converter and boot the zybo. But i cant see nothing in the screen except the text "Input Not Supported". Three leds in the board is lighted up and glow still. I dont know , whats the actual problem with this? Can anyone help me... Thanks in advance
  3. Bonjour à tous, je travaille sur un projet dans le but de detecter la position du moteur à travers d'un flux d'image ou video de l'entree HDMI de la carte FPGA. cette position genere le singnal d'entrée des LEDs pour les allumer. du coup je travaille maintenant sur la conversion de la matrice en coordonnées polaire en coordonnées cartesiennes. y a t'il des documents ou des idées pour programmer le code ?? merci en avance. Translated to English: Hello everyone, I am working on a project in order to detect the position of the engine through an image or video stream of the HDMI input of the FPGA card. this position generates the input singnal of the LEDs to light them. So I am now working on the conversion of the matrix into polar coordinates into Cartesian coordinates. are there any documents or ideas for programming the code ?? thank you in advance.
  4. Greetings fellow FPGA enthusiasts! I'm looking for eyeballs Specifically digital logic enthusiasts, HDL or otherwise, and maybe even those appreciative of retrocomputing (my first Zybo project is a C64 clone after all). It is my hope I might find some people interested in this project: https://github.com/gau-veldt/InsideTheBox and perhaps also the associated "Inside the Box" YouTube channel https://www.youtube.com/channel/UCnVbLwPm8Rrd8YP44djBfoQ where I am going to attempt to explain aspects of the project to others attempting to learn. I'd like to break that feeling that I'm the only one in the world interested in these things (I know I'm not but experience and YT video visitor stats keep trying to tell me otherwise ).
  5. tekson

    Linux image for Zybo Z-10

    Hi all, I m a beginner in FPGA. Last month I got a Zybo Z-10 board from diligent web store. Started working on it using Vivado 2017 edition. I played with leds and switches in PL section. Now I want to run linux image on this board. I tried many tuturials which showing how to boot zybo with linux. but failed. As in the tutorials, I created sdcard with two partitions, one with ext4 and another with fat and then I copied devicetree files, boot files etc in one partition and linux files in another partition. When I boot the board with sdcard monitor shows a black screen with some text like petalinux 2015, zybo login etc. Actually i dont know how the it boot up with linux in zybo board. I dont know whether this screen which I got is correct screen or not. Can anyone help me to boot a linux from my zybo z-10 board Thanks in advance.
  6. Hi all, I'm having an issue with the FPGA SPI interface I programmed onto my microzed. The issue is that the interface cannot read the data sent back from my slave device! I'm using a SAMA5d3-xplained devboard, and an oscilloscope to measure signals. I made the SAMA return the same buffer it received, only with every byte shifted. So it's a semi-loopback routine. The oscilloscope captures both the correct signal back from the SAMA (every byte divided by 2), AND the signal going into it (out of the MicroZed). However, the spidev_test.c (that seemingly famous SPI testing utility on the torvalds repository (https://github.com/torvalds/linux/blob/master/tools/spi/spidev_test.c) program that I'm using shows one of two things: 1. Either the result is always an error of "SPI transfer timed out" 2. or the value in rx is the same as in tx. That is, even though the SAMA slave is demonstrably (via oscilloscope) returning something else, all the RX buffer gets is the same as was sent via the TX buffer. In fact, I can even disconnect the header that plugs the master to the slave, and this behavior becomes no different. The difference between these two results is simply a matter of removing the 1050th line in drivers/spi/spi.c when building the kernel. It's the call to wait_for_completion_timeout() in the function static int spi_transfer_one_message(struct spi_controller *ctlr, struct spi_message *msg). What I get from this is basically that the spi-xilinx.c driver does not know where to look for the output from the slave (MISO), and it either waits eternally for that output (if the call to wait_for_completion is left intact) OR it doesn't care to look for the data and just fills the rx buffer with the tx buffer. Now I have a very limited understanding of hardware and driver programming, so I'm basically like a blind man in the dark here. I'm adding printk() statements to spi-xilinx.c and spi.c everywhere, and checking their results with dmesg and there's just nothing enlightening (I'm using PetaLinux, and the devices all show up correctly in /dev and /sys). I'm hoping someone more experienced can shine a light on what I'm doing wrong here, or at least point me in the right direction. Attached is my device tree file, plus a screenshot of the hardware design. (the relevant node in the DT is highlighted below) amba_pl { #address-cells = <0x1>; #size-cells = <0x1>; compatible = "simple-bus"; ranges; [email protected] { bits-per-word = <0x8>; compatible = "xlnx,xps-spi-2.00.a"; clock-names = "axi_clk", "spi_clk"; clocks = <0x1 0xf>, <0x1 0xf>; fifo-size = <0x10>; interrupt-parent = <0x4>; interrupts = <0x0 0x1d 0x1>; num-cs = <0x1>; reg = <0x41e00000 0x10000>; xlnx,num-ss-bits = <0x1>; xlnx,spi-mode = <0x0>; [email protected] { compatible = "spidev"; reg = <0x0>; spi-max-frequency = <0x17d7840>; }; }; }; goodVersion1.dts
  7. The attached image is probably the easiest way to ask this question .. We want to program 6 devices all at the same time using 6 copies of a USB-JTAG device (as opposed to having once large JTAG chain). It looks like Impact / Vivado does not natively support this (it sees multiple dongles but only deal with them one at a time). Can we script something to load a BIT file on all 6 simultaneously? We currently have the XUP USB-JTAG Programming Cable but would switch to another one if this one can't do it. Thanks!
  8. hi.. ! I need a fpga devolpment board with VGA and HDMI as input and HDMI or DVI or both as output. i googled but not find a single board with these connectors together. Thanks in Advance.
  9. i want to recieve video packets from hdmi port and send it over ethernt RJ45 connector how it can be done with PYNQ board.
  10. Hi, I am trying to compute FFT of a synthesized square wave of frequency 100Hz. The 100Hz signal has to be sampled at 1kHz. So, I kept the clock frequency of FIFO, FFT_IPcore and other blocks at 1ms. I have attached the screenshot of the design file and simulation results. From the simulation output, it can be observed that the buffer stores for 512 samples and the un-buffer after 512*1ms. But, there is no output from the FFT block. I would like to know whether my approach is correct or I am committing any mistake in the way the blocks have to be integrated. Help much appreciated. Regards, Subash
  11. YanivEE

    FPGA learning kit needed

    Hi, My name is Yaniv and i just finished my Electrical & Computer engineering degree. I want to be a FPGA engineer and i need to get a little experience in the next few months (all jobs require 3 + years experience in my country). It would be really nice if you guys could recommend me about FPGA learning kit. I know its digilent site but every FPGA learning kit will be welcomed:) I get the basic point what it is but i dont really understand which one would be better in terms of course material of the internet! Thanks!
  12. Hi, I need the .iic file in order to upload the eeprom IC5, where the Cypress CY7C68013A firmware is stored, by means of CyConsole tool. Currently IC5 does not assert the USB-ON signal, which enables the power on the board. Sincerely, Radek (rsip)
  13. HI, Is their example code on how to use DEPP module of the Adept SDK in National Inst CVI.
  14. Hi there, i a newbie. I hope i am asking the right questions. I have been trying to figure out what kind of hardware/software is needed for my project. The project is getting the images with a high speed image sensor with a frame rate of 500-1000fps at a lower resolutions such as 160x120 or 480x360 pixels. The frames will be read or saved with FPGA SoC board. I know that I have an option of given interfaces: Option 1: Board level image sensor with FFC Cable (LVDS or MIPI CSI-2 interface) Option 2: Boxed camera with USB3.0 Cable interface I would love to think about the option 2. The Basler acA640750um USB 3.0 camera with ON Semiconductor PYTHON 300 CMOS sensor. This camera has a frame rate of 751 fps at VGA resolution. So if I have a FPGA board with a USB3.0 this option would be okay for plug and go ? I hope someone will lead me and help me. Regards, Sirac
  15. Hello, so I followed this axi-dma tutorial and everything looks pretty fine. Now, this tutorial only goes to running a HelloWorld application inside de XSDK. I would like to know how t write something to DDR and how to read something back (specifying addresses e.g.)? To be precise this is how the actual design looks like I would really appreciate some sample C code of how to instantiate (?) the AXI Slave/Master ports to be able to read something from the DDR. Thanks !!
  16. Hello guys, Some time ago I've watched a talk of the nand2tetris course/project. If you've never heard of it you can check it out here: http://www.nand2tetris.org/. Basically it is a course designed to build a computer from the very ground up. It starts with logic gates and goes all the way up to programming a small game project (hence the name nand2tetris). I've always been curious about doing something with FPGA hardware, but never had any idea of a feasible, yet interesting-result-yielding project. Well, as you can probably guess, up until now that is. During my university days I attended an FPGA workshop and I've read some stuff about the hardware components and the available course material such as Basic Introduction and Design flow of Programmable Logic Device FPGA. If you need to pick up something relating to the PLD or FPGA, you can check it out here: http://www.apogeeweb.net/article/67.html. So I think I kind of have an idea about the difficulty of the project. But since everything I've been reading just made me more excited, I decided I absolutely want to give this a shot. Now there's a lot of FPGA information out there, so I'm surely still missing a lot of important information, but I would like to get started and think the best way to learn is to actually experiment with a real FPGA instead of wasting too much time with HDL simulations only to become used to functions that aren't going to synthesize on the board anyway. So I now would like to ask you about some things I'm still unsure about and would like to have clarified before buying an expensive development kit. I've read several articles about Altera and Xilinx and right now my choice would be a Spartan 3E Starter Board - this one to be exact: https://store.digilentinc.com/spartan-3e-starter-board-limited-time/ The main questions I'm having right now: Is there a general reason that would argue against getting the Spartan E3 board? I actually have no idea how powerful an FPGA really is, but assuming it's running on Cyclone II hardware, it probably should run on a Spartan 3 as well? Or is that in itself already a stupid question, as FPGA comparison doesn't work so easily? In general, who is more newbie-friendly, Altera or Xilinx? (I've worked with VHDL before, which I think is Xilinx, right? Altera's Quartus is probably very similar?) From how I understand the FPGA toolchain, in the above linked offer there should be everything included to get me going. right? I also have this second candidate: http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,836&Prod=ATLYS Maybe I'm an idiot, but as I read the offer, *only* the board is sold? I.e., in contrast to the first offer, I would need additional stuff to get something running on the board? It also strikes me as a mayor drawback that there is not really an output option besides a few LEDs. which for me would be very annoying; I'm already unhappy about the board linked before *only* having a small display (which in itself, however, is awesome to have of course). This might also be a stupid question: I remember from back in the FPGA workshop I mentioned that getting a number-display to run is not that hard at all. How much more effort is it to get something displayed on a screen (either an attached one or a PC screen accessed via one of the available ports)? And as a final question: I've also seen some very much smaller boards than the ones linked here, that are also much cheaper. Are the boards I'm looking it overkill for what I'd like to do with them? Or does actually the contrary hold, and such a project wouldn't even run on one of the smaller boards available? Regards, Joshua
  17. Hello, I am using xilinx spartan 6 sp6-x9 board in which its led's and switch works on active low logic. Is it possible to convert switch and leds to to active high logic
  18. ATIF JAVED

    ADC DAC SELECTION

    I want to interface DAC and ADC with some fpga evaluation board My requirement of ADC and DAC is following DAC input ->sampling_rate=2MS/s frequency=455khz ADC Input ->Signal bandwidth=400khz i have no problem of resolution So someone please guide me or refer me some models of adc and dac along with some FPGA evaluation board that complete my requirements . Also refer me if anyone know about some board that have build in adc dac along with FPGA Any kind of help in this regard would be much appreciable
  19. I want to know how to connect a speaker and it's frequency in fpga board.how to send the data to the speaker...?? Suppose when a lift is go to 1st floor it should make a sound like 1st floor like that . Thanks Vamsi
  20. I am gonna start a project with the following setup (attached the overview). I am doing a scaling function on the FPGA. I was thinking about the Nexys Video Development Board. This board got an DP output. But it only has HDMI as input/output. I know that HDMI is almost DVI. I don't think I can use an adapter. I need the DVI-connector and not HDMI-connection. Prioritized is the DVI--> FPGA--> DP connection. Next comes DP--> FPGA--> DP. I need the DVI input according to the picture. I have been reading about a FMC DVI I/O on Avnet but I can not find it. Any help to solve this hardware/component setup would be much appreciated! (Which FPGAs and FMC to use) Regards
  21. Hi, I want to program my KC705 board with raspberry pi. I have downloaded adpet utilities and adept runtime on raspberry pi. I know python programming but I am not very fluent with c coding. If anyone can help me with programming following modules it will be really helpful to me. programming FPGA with bit files. programming flash with bin file(or any other file format) If possible loading mfs files or elf files on DDR memory.
  22. Hello Digilent, I am just going to buy an ARTY A7 35T board and I have to interface an external ADC ADC7091R with it. I know it has an on board XADC but I need to do for some specific purpose. Now I have seen a Pmod of ADC7091 R given in its datasheet and I want to know that "DO ARTY A7 support pmod of ADC7091R". Thanks
  23. What is Digilent providing to support Labview connectivity to your latest FPGA boards? The older Nexys3 board had the Adept software and Labview driver that allowed Labview to communicate to the FPGA board as if it was a simple parallel interface. This is no longer supported by your latest FPGA boards from what I can see. So what do you provide to allow Labview to talk to your FPGA boards?
  24. I am attempting to build upon the hdmi demo, here is what I want to accomplish: Take over PMOD_C port as a general purpose digital output (8 pins) Here is what I have done (aside from debugging for hours) I dropped down and wired a PmodGPIO_0 block in my design and connected it to PMOD_C (JC), used the auto-connection automation function in Vivado. The build seems to work just fine, exported hardware, etc as normal. In SDK I get a drivers/ directory in hw_patform_1 with PmodGPIO_v1_0 and everything looks fine. Here are the exact steps I followed from here to where I am now: copied PmodGPIO.h down to hdmi/src (build project directory) copied code (functions) from PmodGPIO.c into video_demo.c (build main .c) copied code (init, main, close) from output_demo.c into appropriate places in video_demo.c Question 1) The code would not execute, because it appears the XPAR_ for PMODGPIO does not feed correctly into xparameters.h. Is this normal? I tried to workaround by checking system.hdf and found the base address for my PMODGPIO 0x40000000 and hard-coded it. This would allow the code to compile, but it does not run correctly, it hangs in GPIO_begin on the statement Xil_Out32(InstancePtr->GPIO_addr+4, bitmap);. This is the first statement where it attempts to write to the mapped memory. I have a feeling that something with the PmodGPIO IP is not building correctly for me, but I don't know how to correct it. I have tried several times to clean and rebuild the project, but again I don't know if I am taking the right steps. Question 2) Is there some type of 'build' that I need to do in SDK or somewhere else to initialize the IP correctly and be able to write to the PmodGPIO ? Thanks!