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Everything posted by Audrius

  1. You need to register the callback that notifies you when some data have already be sent and acknowledged. This hook is registered with void tcp_sent(struct tcp_pcb * pcb, err_t (* sent)(void * arg, struct tcp_pcb * tpcb, u16_t len)) Inside this function, you can check if you actually have more data to send and if so, enqueue now. As the data have just been sent, it should be more place in the buffer now. You may also need to call tcp_output after you enqueue the data. It is not possible to send more than the size of the buffer from the receive callback, even if you call tcp_output there with the hope to get more room.
  2. Most often, only a single core runs full speed during the synthesis, and the frequency of this core becomes the most important thing to care about. I attach the CPU usage graph taken while running Vivado synthesis for Zybo Z7 on the six core CPU. I suspect that some seriously overclocked and water cooled gaming workstation would help with productivity.
  3. We are scientific startup from Zurich ETHZ, Switzerland. We are building robotic camera systems like no other! If anybody wants to join us, the startup is currently growing. Our system is based on ROS, C++ and python. It uses the latest achievements for machine learning and computer vision. As recently "FGPA" started to appear next to "machine learning" and "computer vision", and the whole system is very demanding in terms of performance, we have recently bought Zybo Z7 in order to check what can we do with it. Moving ahead not so badly, amazing device.
  4. Serial digital interface (SDI) is a digital video interface used with the most of professional video cameras. It uses BNC connector and operates at speeds of 3 Gb/s or about, depending on the standard. The more detailed specification can be found in wikipedia. Most of the SDI adapters for FPGA use FMC connectors, like this one. There is no FMC connector on Zybo Z7 board, but it does have multiple PMOD ports. Could they probably substitute? If some simple extra circuitry is required, we maybe could build it on the top of some generic PMOD adapter like this. My major doubts are, would such interface be fast enough? I am not aware at which frequency Zybo PMOD port and the custom circuitry attached to it could operate.
  5. Microblaze is not difficult to work with. All tools and work flow sequences are basically identical to the tools and sequences used with Zybo Z7 embedded processor. You can nicely program in C. AXI modules become accessible in the address space and easy to deal with. From the other side, Microblaze is a rather slow single core CPU that, by itself, will not bring performance benefits normally associated with FPGA. If you just need an embedded CPU for your task, there are cheaper devices available.
  6. It may be that the SDK project exported from Vivado is somehow broken, maybe export has been done on another machine everything was now moved into different folder. In my case, the sequence of steps removing (just rename it in case you need the way back) the folder ending with .sdk (like GSWZ_2018_3_ZYBO_Z7_20.sdk) in the tree of the relevant SDK project exporting hardware in Vivado application again (export hardware, include bitstream) exporting in the project scope and then starting the SDK from Vivado. helped against the same error message. Also, simply be sure you export hardware not something else, and include the bitstream.
  7. Great, it now worked! Well, initially the SDK was showing me the messages about some wrong executable selected for download (attached). However then I have removed the folder GSWZ_2018_3_ZYBO_Z7_20.sdk, repeated all steps of creating the bitstream in Vivado starting from synthesis and exported hardware again, it unexpectedly worked, showing "Hello world" on the tty output as if nothing. It even works with JP5 in the middle QSP1 position. I also was able to get the "Hello world" easily on TFC Debug virtual terminal. I did not change anything in my board files or system configuration. Also, yesterday evening I brought Zybo Z7 to my Windows 7 workstation and repeated all steps there, reproducing essentially the same behavior. Probably Vivado 2018.3 cannot create a working "Base Zynq" project for Zybo Z7 from scratch, even with the board files provided. However now I can use your reference project as a starting point, by adding my AXI modules there. Thanks a lot for your help. May the Force we with you!
  8. $ djtgcfg enum Found 1 device(s) Device: ZYBO-Z7 Product Name: Digilent Zybo Z7 User Name: ZYBO-Z7 Serial Number: 210351A786B0 $ dadutil showinfo -d ZYBO-Z7 Product Name: Digilent Zybo Z7 User Name: ZYBO-Z7 Serial Number: 210351A786B0 Product ID: 01D00257 Firmware Version: 010A Device Transport Type: 00020001 (USB) Device Capabilities: 00000001 DJTG - JTAG scan chain access Thanks for your care. Ok I have installed Adept 2, here is the output on the command you asked and also another that may be useful. I think I have already installed the drivers before but anyway I have verified everything again step by step, the log is attached. I have freshly exported hardware from Vivado to make sure the code in SDK has no any of my alterations. Unfortunately there is not so far any difference in behavior. I also tried to use minicom instead of SDK window. After attempting to run the hello world example, it prints the same "Demo Image" phrase: $minicom -b 115200 -D /dev/ttyUSB2 Welcome to minicom 2.7 OPTIONS: I18n Compiled on Nov 15 2018, 20:18:47. Port /dev/ttyUSB2, 18:33:41 Press CTRL-A Z for help on special keys Initializing... init:done Zybo Z7-20 Rev. B Demo Image (if JP5 is in the middle position). If on "JTAG", no output. drivers.log
  9. When running from Xilinx SDK (2018.3) I cannot get the trivial "Hello world output" from my Zybo Z7 board. However I do get the following messages: Connected to /dev/ttyUSB1 at 115200 Initializing... init:done Zybo Z7-20 Rev. B Demo Image This means that I in general can talk to the port that appears in /dev most often as /dev/ttyUSB1 but at times under different number, so the problem is different from just being unable to get serial port working. The port was initially not accessible due permissions but I have worked around by changing them with chmod. I also added myself to dial group by s'udo adduser audrius dialout' . This has no effect. I have created the "Base Zynq" project with Vivado, generated bitstream without any changes to it, exported (Export hardware, include bitstream) and opened SDK using Vivado menu commands under "File" group. In SDK, I asked to create a new application project, standalone platform, "Hello world". I have selected "Program device" in SDK and passed this step without any obvious errors, with progress bar gradually moving as device is programmed. Also, Vivado shows the device temperature correctly. I noticed that when I do the device programming, the demo LEDs stop flashing in all colors. Only red LD13, green LD12 and green LD4 remain on. However when I attempt to run the project from SDK, multiple LEDs start flashing again, indicating that probably a reset has happened. At this point the "Zybo Z7-20 Rev B Demo Image" appears on the SDK terminal (115200 bauds) , so the terminal in general works. Looks like another "debug terminal" for two cores opens in SDK (TFC Debug Virtual Terminal cores 1 and 0) at this point but also remains empty. I have tried to change the stdout in BSP settings, but switching between "ps7_uart_1" and "ps7_coresight_com" results no changes in behavior. I tried to move the jumper JP5 between JTAG and QSP1. The "Demo image" message shows up in QSP1 position. In JTAG position, just nothing appears. I also tried to flash the bitstream from Vivado directly but this did not change anything. I have no problems in getting the output from KCU116 Microblaze after the similar sequence of actions but this is on another host (Window 7). I am using Ubuntu 16 (4.15.0-43-generic #46~16.04.1-Ubuntu SMP Fri Dec 7 13:31:08 UTC 2018 x86_64 x86_64 x86_64 GNU/Linux) I attach SDK logs and synthesis logs. Board files I have downloaded from After installing as described in I was able to find and select the Zybo Z7 - 20 after restarting Vivado. While the board was initially powered by USB 3, I tried the 5 V wall adapter later, no changes. Last think I tried was connecting the pin aux_reset_in of the block rst_ps7_0_50M to constant value 1 in Vivado designer. It looks like reset signal with active low, so, thought, maybe not a good idea to left hanging as it is initially created. Yet was not helpful. Summarizing, looks like the demo image boots, and the card can be accessed and programmed by Xilinx tools, also serial port works, but the "Hello world" from SDK does not run at all or crashes immediately after start. sdk.log synthesis.log