StefanOR

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  1. StefanOR

    GPS driver question.

    Hey All, I am working with the GPS driver in Xilinx SDK and it's working fine, however I noticed many of the functions trigger off "GPS.ping". What governs GPS.pings value ? Does it go high on the rising edge of the PPS (pulse per second) pin or is tied to the valid reception of a GPS data (NMEA sentence for example)? Any insight would help, trying to integrate GPS into a project. Thanks !!
  2. Thanks for the advice @jpeyron ! I ended up just using a constraint file and full hardware design bypassing the PS.
  3. Hey All, I made a custom ROM subsystem IP for a larger project I am working on and would like to verify it on hardware (in my case a Zedboard). I have already verified the subsystem works with test bench. My idea is essentially to tie the output signal of my ROM (1 bit width at 10Mhz) to a PMOD port and measure the signal on my Oscilloscope. My question is with the specifics of assigning a PMOD port as a general output. Can I simply use the GPIO PMOD IP core provided by digilent? If so, how do I tie my signal to a specific pin of the PMOD port? I will attach a picture of my naive first attempt at solving this. Thanks for any and all help/recommendations!
  4. Hey All, I am receiving an error message when attempting to connect my usb_uart port to my block design. I am using a Zedboard with vivado 2018.3 and the master github XDC file. I will attach images of my block design, error message and the xdc file to this message. Help/ suggestions would be appreciated, I think I just need to set the IO standard somewhere. Best! Zedboard-Master.xdc
  5. Hey All, I know that the diameter of the cell should be 12.5mm, but what battery height should I use. Or any cell suggestion would be appreciated. Also any antenna suggestion would be appreciated. I am working with a zedboard as my base and will be using the 1PPS signal output for a project. I was hoping to get input from some people who have used the PMOD. Thanks! Best!
  6. Hey All, //**very simple question**// I was hoping to get some clarification on implementing a test I would like to run on my PMOD pins. I want to use the lines of the PMOD pins as general digital outputs for flashing 1's and 0's, and I am seeking advice on how to best implement this. I would like to prepare the connections in Vivado and export to SDK to manage how/what I send to the pins. My understanding is that in Vivado I can add the constraint file for the Zedboard and write a top module that sets the pins to outputs then export to SDK and write my program there. Or I can prepare the hardware using a block design and the IP integrator, in this case would I just need to connect my ZynqP7 block to an axi-gpio block or is there another IP block I should be using? Finally, my goal is to access all of the PMOD pins as general output/input, however it is my understanding that the JE pmod connector is attached directly to the PS, so would I even need to do anything in Vivado to program the pins on JE? Any/all help is appreciated! Thanks! **Edit** I found the "PMODGPIO_0" IP core and it looks like this generally does exactly what I described above. However, I am still curious about how/if others implement this in there designs (i.e. using just the constraint file and verilog/vhdl or using the "axiGPIO" IP core).
  7. Hey All, I posted earlier today about an error I was getting when building the driver for the ESP32 PMOD for my Zedboard with Vivado 2018.3. @jpeyron was able to answer the question and fix the issue. However, I am getting a similar error message when attempting to build the driver for the GPS PMOD now, but I suspect my error to originate in my Vivado Block Design . I will attach my Block Design and SDK readout images to this post. Questions: Should I connect my "gps_uart_interrupt" port on the GPS PMOD core to an generic interupt controller? If not how should this be connected?
  8. Hey @jpeyron Thanks for the reply. I tried saving the file (Main.c), Regenerating BSP sources, and deleting/remaking BSP file and the error is still being thrown. I am using Vivado 2018.3 and am developing on Zedboard. I will attach pictures of my Block Design and SDK path directories to this email. It seems like the issue would be with where ever the "XPAR_PS7_UART_0_DEVICE_ID" is being defined. Possibly Xparameters ? But I haven't been able to find anything similar to this variable name. Thanks for the help!
  9. Hello All, I am getting a make error when attempting to build the PMOD ESP32 driver in Xilinx SDK. I will attach a picture of the the error and my SDK flow. I included all the path directories for the console application folder in the C/C++ Build Directories. The problem is essentially that "XPAR_PS7_UART_0_DEVICE_ID" doesn't exist. Is it under a new name perhaps? Should I export "Main.C" to the "src" folder? Any help is appreciated! **This is the line of code that is giving me the issue** "#define HOST_UART_DEVICE_ID XPAR_PS7_UART_0_DEVICE_ID"
  10. Thanks so much @jpeyron
  11. Hey All, I am trying to make a simple IP block design in Vivado 2018.3 to test the ESP32 PMOD out using AT commands for data transmission. I will attach a picture of my current block diagram to this post. I am getting a critical error (reference below) that says the IP has a packaged board value of "digilentinc.com:cora-z7-10:part0:1.0" which is for the Zybo z7 board. My questions are: Q1)Will this design work regardless of this error, as the Zybo and Zed boards are similar and both run off the zynq-7 architecture? Q2)If the answer to Q1 is "no", is there a method of adapting this IP for the Zedboard? (I should be using the latest IP library from Digilent) [IP_Flow 19-4965] IP PmodESP32_axi_gpio_0_0 was packaged with board value 'digilentinc.com:cora-z7-10:part0:1.0'. Current project's board value is 'digilentinc.com:zedboard:part0:1.0'. Please update the project settings to match the packaged IP.