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About Jnadin

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    Innovative Business Park, Derker Street, Oldham
  1. Jnadin

    Jtag HS3

    I have attached the part of the schematic that connects the jtag init to the ps_srst_b pin. Looking at the document you linked, I believe I have called the SRST on the JTAG-HS3 as JTAG_INIT however this looks to only be connected to PS_SRST_B on the FPGA which it already is. Should this connection remain?Should I add a wire from JTAG_INIT to FPGA_INIT_B? At the moment the FPGA_INIT_B is only connected to a toggle led. Red if not initialised and green if initialised.
  2. Jnadin

    Jtag HS3

    I have attached two schematic drawings. We have recently got the zynq and jtag talking to each other by setting the boot mode to boot directly from JTAG. Also by removing the pull-ups on the jtag lines. Original the FPGA was configured to boot from NAND. However, seeing as we have not put any data into the NAND nothing was happening. I think that the QSPI on zedboard and zc702 must have something inside it so when JTAG is detected you can interrupt the boot sequence. Do you know if this is true or not? Ideally, we would want to be able to keep the NAND boot mode and intercept with the JTAG.
  3. Jnadin

    Jtag HS3

    Hi All, I am having issues using the JTAG HS3 with my PCB that uses zynq 7020 chip. I have tried using it with zc702 and zedboard and these seems to work however plugging the device into my board the device is not found. I am guess there is something I have missed when designing the board. I have the lines pulled high to 3V3 which then go to the FPGA. Is there any thing else I need to consider for the PCB to work with this device? was anyone able to design a board that had this JTAG working? Kind Regards, J. Nadin