mskreen

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  1. @noir, Just tried this (commented the #define Verbose) and I can already see a significant decrease in the amount of time it takes for my program to load through flash. Very cool, good find! Mikel
  2. @noir, When you say the Cmod-A7 outputs infinite "Bootloader: Processed (0x)0000022a S-records" do you mean that it starts counting up from address 0x0 and stops at 0x22a or that it starts at 0x22a and just idles there? It sounds like the program might not have the correct offset in flash so only part of the program is saved to flash. Are you just trying to save a "Hello World" program in flash like in the tutorial? When I run the program from flash it only counts up to 0xcd. One of the few issues with the Cmod-A7 is its limited flash memory (4MB). Although this is small, when using a uncompressed bitstream and utilizing most of your FPGA in your block design your bitstream at its largest should only be around 2MB. I think it would be worth your time to go back and generate a compressed bitstream and try the tutorial again or at the least, experiment with lowering your offset. Hope this helps! Mikel
  3. Antonio, What I meant by "larger projects" was strictly bitstream and ELF file sizes. I am not 100% certain but I don't think you can increase your heap and stack size larger than the amount of local memory that you specified when you ran the block automation for MIcroblaze in your Vivado design. The heap and stack are for use at run time and have nothing to do with flash memory. How much are you trying to increase your stack and heap by? Mikel
  4. Antonio, For larger projects it may also be necessary to compress the size of your bitstreams in order for them to fit properly in flash given that you only have 4 MB worth on the Cmod A7. I have updated the "How To Store Your SDK Project in Flash" tutorial to provide instructions on how to do so. Mikel
  5. Zermelo, I ran through the demo, changing the Flash Type to s25fl128sxxxxxx0, and loading a simple "Hello World" program into flash and it worked just fine. I tried the demo twice, using a 50MHz clk for one and a 100Mhz for the other (just like in your Block Design). Are you using the same offset as in the guide (0x00C00000) in both steps 1.3 and 4.1? If you change the offset in blconfig.h at any point you will need to regenerate your Download.bit by reprogramming the FPGA. You can verify that your program works at this point because it should mimic the behavior of a power cycle. The error you are getting most commonly occurs when the address for the bootloader and program overlap or don't have adequate space in Flash. Mikel
  6. mskreen

    Arty Manual

    JerryG, A PDF version of the Arty reference manual has just been released. You can find a link to it on the existing Arty "Reference Manual" page or here for your convenience. Mikel
  7. Yeah that was one of the links I originally presented to you... Reading the links that I provided would have made it very clear that the Spartan-3E kit is an older package that is not officially supported by Xilinx on newer operating systems (8 - 10) but there are workarounds to getting your software to work on them. Since this board does not have a Digilent programmer (it has a Xilinx programmer) you cannot use our Adept software and therefore must use Xilnx's Impact software (latest version 14.7). Yes the Spartan-3E kit can still be bought on Digilent's online store. This is because there is still a want for this board and still works on older operating systems such as Windows 7. Since the board has a Xilinx programmer, that means that Xilinx is responsible for supporting programming methods for this board not Digilent. Mikel
  8. Hello XZ_ESD, I have have never attached an external antenna to the Pmod GPS so I can't speak from experience but in the data sheet for the Pmod GPS antenna on page 4, paragraph 2 it states that the GPS module has "an extra embedded function for external antenna I/O and comes with automatic antenna switching function". From this it sounds like the GPS device is smart enough to tell if you have an external antenna connected or not and will switch between the two. Again I cannot speak from experience. Hope this helps! Mikel
  9. Thanks for the input Gra. John have you had any luck getting your computer to recognize the board? Mikel
  10. John, Have you tried any methods of installing/reinstalling/purging drivers? If so, what have you done? I managed to get my hands on a Spartan-3E kit and didn't have any problems with my computer loading the drivers (win 8.1). I found another Xilinx tutorial that might be helpful: -AR #41442 Let me know of your results. I would suggest just trying all the cable driver re-installation methods that you can find. The board/software is so old that you never know what might work. Mikel
  11. John, How are you trying to connect to your device in Impact? This board is old enough that it doesn't have a Digilent programmer so I believe you will need to select the "Platform Cable USB/II" communication method instead of the "Digilent USB JTAG Cable" in the Cable Communication Setup. Unfortunately I don't have a Spartan 3E kit in front of me to test this out on. Mikel
  12. mskreen

    Arty Manual

    JerryG, A PDF version of the Arty Reference Manual is in the works and should be available within the next few weeks. Respectfully, Mikel
  13. Hi John, So assuming that you downloaded ISE 14.7 it looks like there are some workarounds to installing and running ISE on a windows 10 machine: - AR# 62380 - Guide: Getting Xilinx ISE to work with Windows 8 / Windows 10 (64-bit) In order to be of more help could you please provide some more detail into how you know that the drivers aren't working properly, and if you are able to create a project where exactly you are experiencing your issues? Any additional information would be helpful. Respectfully, Mikel
  14. mskreen

    How to program Arty flash

    Great to hear Enrico! Let us know if you hit another roadblock or need anything else. Also, feel free to comment on the guide if things were not clear or if we could improve it in some way. A little constructive criticism is always welcome. Mikel
  15. joeq, There was an older post where someone was experiencing these issues as well. That guide was created by Avnet and doesn't follow the general design flow as our projects do. I would highly suggest that you take a peak at our Arty Tutorials located on the Arty reference page. There are some great easy to follow step by step guides and we fully support their compatibility. Hope this helps! Mikel