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  1. herve

    PMod AD4 (16 bits/1MSPS)

    Hello @Ana-Maria Balas Thank you for your quick reply. The Pmod AD4 would have been the best compromise for my application (R = resolution> = 14 bits and SR = sampling rate > = 100 kSPs). I need a resolution greater than 12 bits (14 bits, 16 bits, ...). I also need a sampling frequency of at least 100 kHz (100 kSP). The sampling rates of PMOD-AD1 and AD2 are ok, but their resolutions (12 bits )are lower than I want (>= 14 bits). The PMOD-AD5 has good resolution (24 bits), but its sampling rate is less than what I need (4.8 kHz <100 kHz). Do you have
  2. Dear all, Has Digilent stopped manufacturing and selling the Pmod AD4 (16 bits and 1 MSPs)? I can not find it online. Thank you. B.R Herve
  3. @xc6lx45 Thank you! I will look at the open-source xc3sprog utility. @Dan Thank you! I know the vivado option to create a * .bin file :) I will use a hex editor to open the bin file and read its contents. Then I will try to transfer this content into the flash and check if the fpga can be configured from this flash memory at startup. Herve
  4. Is it possible to write a VERILOG / VHDL code to download the programming file (fpga bitstream) to the hardware device (for example an SPI flash memory)? I'm asking this, because I would like to transfer a bit stream into a spi flash memory, which will then be mounted on an fpga card for boot and configuration. I have already written a few lines of code to write, read, and erase the contents of the 32 MB NOR flash memory (PMODSF3). I tested my code and it works without problems! However, how to read the bitstream, before writing it to the flash memory? Do I only need to transfer the
  5. Thank you guys for all your help and assistance. In the end, I think the best solution would be to design a custom DAC that meets my needs, even if it takes me away for a moment from my main goal. I also think that if Digilent ever came up with Pmod ADC/DACs with a sample rate greater than 2 MSPs, this could be of interest to many people. Thanks! H
  6. This is the absolute group delay and not the delay uncertainty. If it was the delay uncertainty, yes I could mitigate it by interpolating the samples. Thank you. H
  7. Hi xc6lx45, A conventional audio codec will be insufficient because I have to control the delay of my processed signal with a precision of at least 0.5 us (2 MHz). Which means that if my DAC has a sampling rate lower than 2 MSPs, I could not reach the 0.5 us required! Thanks! H
  8. Hello everyone, I am looking for an ADC and a DAC of at least 2 MSPs and a resolution greater than or equal to 12 bits. I do not want to use ADC or DAC with an FMC type interface (I do not have enough free pins on my FPGA card). A serial type interface (SPI) would be nice. Are there PMODs that have these characteristics? If not, can you recommend an ADC / DAC with these characteristics (> 2 MSPs and> 12 bit resolutions)? I have to process signals of frequency <= 10 kHz and send them to a DAC with a resolution of at least 12 bits and an acquisition speed of at least 2 MSPs. Th
  9. herve


    @xc6lx45 Thank you for your answer and the link! Regards, H
  10. herve


    Hello @BogdanVanca Thank you for your reply with part numbers. There is still one opened question without answer. I still need to clarify if it is possible to drive the enable pin at a rate higher than 2 kHz? If yes, what is the highest rate? I looked through the datasheet, but I there is no details about the highest rate one can drive the enable pin. Thank you Kind regards, H
  11. herve


    Hi, I have a couple of questions regarding the PmodHB5. How fast can I control the Pmod Hb5 activation pin? In the reference manual (page 2),there is an example with a 2 kHz and 50% duty cycle. Is it possible to drive that pin at a rate higher than 2 kHz? If yes, what is the highest rate? How fast can I switch on and off the transistors of the Pmod Hb5? Is it possible to have the datasheet of those transistors? Thank you.
  12. Hi Dan, I do not know if I should continue to interact with you on this forum or should I continue on the FPGA forum? Anyway, I have recently purchased a Digilent PmodSF and I started to write a verilog module to interact with that memory. I successfully implemented the read identification command based on the Micron M25P16 datasheet and was able to read the manufacturer and device IDs (0x2020 15). I also implemented two other modules based on Micron M25P16 data sheet ("write enable" and "read status register"). However, after executing the "write enable" command, the output
  13. Thank you Dan! I will try to follow your advice and let you know if I face any problems! Regards, H
  14. Dear Digilent, I have a simple design on a BASYS3, which contains a MICROBLAZE, a LED and two PUSH BUTTONS. I can control how fast the LED is blinking by pressing the PUSH BUTTONS. The BITSTREAM of that design is stored in a non-volatile serial Flash device, which is attached to the ARTIX-7 FPGA using a dedicated quad-mode (x4) SPI bus. When the system starts, the contents of the flash memory are read and the FPGA is configured normally. I would like to be able to memorize the latest configuration of the PUSH BUTTONS in a non-volatile memory, so t