That_Guy

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  1. That_Guy

    Diving in

    Thank you both @xc6lx45 and @D@n, LUTs of useful info. Gave me plenty to dive into and consider for this project. I'm very inclined at the very least to include space on the PCB for an analog mixer to extend the range.
  2. That_Guy

    Diving in

    I ran the CMOD a7 test you wrote, and got 1568ms. Great first usb test, though compiling in C# was new for me. Always the little things that trip ya up! One of the things that I don't get about creating a LO, it seems like it's very desirable to have a pure sin wave, and I'm not familiar with any good method for building a wide range high frequency generator. I have a bit of a desire to go above the project description and tack on something to allow me to look at ~100Mhz FM band, or 88.5 to satisfy my NPR needs, but the only 'good' thing I've found for LO generators are VCO colpitts oscilators, and to make a wide range with those looks to be a bit of work. If there's an FPGA trick for making a LO I'd love to know
  3. That_Guy

    Diving in

    Yup! I fully recognize that SDR is quite a deep topic, and the emphasis for this project is "very simple" lol. The FPGA will be primarily an interface between the ADC and computer, we are only receiving signals (other team is transmitting) and we are keeping it under ~5Mhz carrier which should eliminate the need for a mixer or some of the tricky analog front end. It's a very basic introduction to SDR, but more than enough to keep me busy for a bit. Matlab has been a wonderful resource for figuring things out in the earlier stages, and I'm sure it'll continue to help as my team figures out what we're doing wrong.
  4. That_Guy

    Board repository path

    This seems like a silly question, but I've been told as a rule not to spend more than an hour on a silly problem. I am getting a healthy couple of warnings in Vivado about the board repository path (see attached). Just a typo, missed a backslash in the path. I've already made sure all Vivado_init.tcl files are correct. The project implements just fine, but I would love it if my warnings were meaningful, and I'd rather not suppress warnings How would I go about editing the path to resolve the warning? Cheers
  5. That_Guy

    Diving in

    Hello all, I am studying computer engineering, but I have a strong leaning towards the hardware side. I have played around with FPGAs a little in community college, and I'm diving into a more in depth course now. Great timing too, as I am planning to use an FPGA for a (very simple) software defined radio. For any other new users scrolling through here, my analog discovery 2 has been an invaluable tool as a portable starter scope. I'm sure I'll accumulate more gear in the future, but for now it's more than capable for what I need.