DanielD

What is the drawback of using the VCC1V8 for an IO bank? It is not directly related to VCCAUX except that it might cause some crosstalk, isn't it? For sure I can use level translators. The reason why I don't want to use them as a primary approach is that the A7 board is used for a quick customer demonstrator setup. Therefore I want to keep the BOM count/complexity and mounting/manual prototyping effort as low as possible!

Hi, I want to attach an 1V8 DRVDD ADC to the CMOD A7 Board via the PIO pins. However all A7 PIOs are on VCC3V3. To provide a 1V8 PIO I see two options: 1) Patch VCCO_35 and VCCO_16 to VCC1V8 2) Patch VCCO_34 to VCC1V8 Implementation of Option 1) would be: - Cut VCC3V3 trace at C54 and C29 - Patch VCC1V8 from C82 to C54 and C29 Implementation of Option 2) would be: - Cut VCC3V3 trace at C41 - Patch VCC1V8 from C82 to C41 Can you please tell me, if there is an appropriate place on the PCB to cut the VCCO_3V3 trace before C54, C29 and/or C41? I saw other Forums entries discussing this. The most appropriate is [1] which gives hints to patch the Basys Board. Thank you very much and best regards, Daniel. -- [1] CMOD A7 Wiki: https://digilent.com/reference/programmable-logic/cmod-a7/reference-manual