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  1. Pavel_47

    JTAG-HS2 under linux

    Hello, Can I use JTAG-HS2 under Linux and in particular with Vivado ? If yes, how properly install it ? Thanks.
  2. Yes. It works ! I've compared the output of my program with the "golden" result, obtained from the execution of the fpga -config-status instruction. And it's the same !!! Thanks.
  3. Hi, Yes! Probably have a reason. After a closer look to the "golden waveforms" I see that it doesn't correspond to 100% to the sequence,described in the table 6-2 of UG470. Here is the beginning of the "golden sequence" picked with LeCroy: I've divided this beginning part in 6 phases: phase 0: don't understand what is it for phase 1: put TAP controller in TLR state (because with TMS = 1 five consecutive pulses are sufficient to return to TLR from whatever state) phase 2: put TAP controller in Shift-IR state phase 3: shift CFG_IN (000101) instruction into IR register phase 4: ... and it's here that it becomes interesting: being in Shift-IR state (because TMS = 0), TAP continue to inject'1' into IR register ... so probably to push 000101 further in the JTAG chain ? And 4 supplementary bits correspond to 4 bits of IR of ARM (BTW where did you learn that ... i.e 4 bits for ARM ?) phase 5: given that the phase 4 ends up in Exit1-IR state (TMS = 1 on last pulse) TAP controller goes (through Update-IR, RTI, Select-DR, Capture-DR) to the Shift-DR state. phase 6: being in the state, te TAP controller starts to inject configuration packets into DR register starting from synchronization word 0xAA995566. So if this analysis is correct I just need to insert addition shift of 4 bits into IR register ? Do you have any idea about result of execution of dadutil command ? Thanks. P.S. Here is JTAG controller diagram:
  4. Hi, I'm afraid I didn't properly understand what you mean. If I push BYPASS code into IR, how it will help me to resolve the problem ? In the "golden sequence" (i.e. fpga -config-status) I don't see. One more observation: the execution of dadutil enum -t produces the following: No devices found. So, if my comprehension is correct, digilent utility dadutil doesn't see Xilinx chips? I've tried it on two boards: XC706 (Zynq-7045) and KCU105 (Kintex Ultrascale) and the result is the same. BR.
  5. Thanks for suggestion Zygot. Xilinx forum as well as Xilinx official support were already tried ... no any result, so I should search for a solution myself. Sincerely Pavel
  6. Hi Gra, Thanks for feedback. No, partial configuration isn't my primer interest, but rather ... as I sayed below - frame-based configuration, which is not the same thing.
  7. Hi Zygot, The goal is to perform "customized" configuring of FPGA ... e.g. frame-based. It means one frame or several frames (not whole bitstream !) are read, then modified in certain way, and then rewritten back in the FPGA. To my knowledge there is no tools that provide such capability. Sincerely. Pavel.
  8. Thanks JColvin, Yes, you were right - I was wrong trying to pass CFG_IN instruction that way. Since my code has undergone many changes. Here how it looks now: Declaration part: HIF hif; char jtag_version[20]; BYTE reset_JTAG_tms[] = { 0x1F }; BYTE move_Shift_IR_tms[] = { 0x0C }; BYTE shift_IR_tmstdi[] = { 0x11, 0x08 }; BYTE move_Shift_DR_tms[] = { 0x03 }; BYTE shift_Packets[] = { 0x55, 0x99, 0xAA, 0x66, 0x04, 0x00, 0x00, 0x00, 0x14, 0x00, 0x07, 0x80, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00 }; BYTE shift_Packets_last[] = { 0x00, 0x80 }; BYTE move_shift_IR1[] = { 0x07 }; BYTE shift_IR1[] = { 0x10, 0x08 }; BYTE shift_zeros[] = { 0x00, 0x00, 0x00, 0x00 }; BYTE recv_buff[4]; Execution part: private: System::Void btn_Reset_Click(System::Object^ sender, System::EventArgs^ e) { DjtgGetVersion(jtag_version); if (!DmgrOpen(&hif, "JtagSmt2")) { lbl_error->Text = "Error: Could not open device. Check device name"; } if (!DjtgEnable(hif)) { lbl_error->Text = "Error: DjtgEnable failed"; } // Put JTAG in TLR state if (!DjtgPutTmsBits(hif, fFalse, reset_JTAG_tms, NULL, 5, fFalse)) { lbl_error->Text = "JTAG reset failed"; } } private: System::Void btn_Clear_Click(System::Object^ sender, System::EventArgs^ e) { lbl_error->Text = ""; } private: System::Void btn_GetPortProperties_Click(System::Object^ sender, System::EventArgs^ e) { DWORD properties = 0; if (!DjtgGetPortProperties(hif, 0, &properties)) { lbl_error->Text = "ERROR: failed to get JTAG port 0 properties, erc = " + DmgrGetLastError(); } lbl_GetPortProperties->Text = properties.ToString(); } private: System::Void btn_MoveShiftIR_Click(System::Object^ sender, System::EventArgs^ e) { if (!DjtgPutTmsBits(hif, fFalse, move_Shift_IR_tms, NULL, 5, fFalse)) { lbl_error->Text = "moving to Shift-IR failed"; } } private: System::Void btn_ShiftIR_Click(System::Object^ sender, System::EventArgs^ e) { if (!DjtgPutTmsTdiBits(hif, shift_IR_tmstdi, NULL, 6, fFalse)) { lbl_error->Text = "Shifing IR failed"; } } private: System::Void btn_MoveShiftDR_Click(System::Object^ sender, System::EventArgs^ e) { if (!DjtgPutTmsBits(hif, fFalse, move_Shift_DR_tms, NULL, 4, fFalse)) { lbl_error->Text = "moving to Shift-DR failed"; } } private: System::Void btn_ShiftDR_click(System::Object^ sender, System::EventArgs^ e) { if (!DjtgPutTdiBits(hif, fFalse, shift_Packets, NULL, 152, fFalse)) { lbl_error->Text = "Shifting DR failed"; } } private: System::Void btn_ShiftDR_last_Click(System::Object^ sender, System::EventArgs^ e) { if (!DjtgPutTmsTdiBits(hif, shift_Packets_last, NULL, 8, fFalse)) { lbl_error->Text = "Shifing DR last failed"; } } private: System::Void btn_ShiftIR1_Click(System::Object^ sender, System::EventArgs^ e) { //move_shift_IR1 if (!DjtgPutTmsBits(hif, fFalse, move_shift_IR1, NULL, 5, fFalse)) { lbl_error->Text = "moving to Shift-IR failed"; } } private: System::Void btn_ShiftIR1_Click_1(System::Object^ sender, System::EventArgs^ e) { if (!DjtgPutTmsTdiBits(hif, shift_IR1, NULL, 6, fFalse)) { lbl_error->Text = "Shifing IR failed"; } } private: System::Void btn_GetStatReg_Click(System::Object^ sender, System::EventArgs^ e) { if (!DjtgPutTdiBits(hif, fFalse, shift_zeros, recv_buff, 32, fFalse)) { lbl_error->Text = "Shifting DR failed"; } else { lbl_error->Text = recv_buff[3].ToString() + recv_buff[2].ToString() + recv_buff[1].ToString() + recv_buff[0].ToString(); lbl_Byte0_val->Text = recv_buff[0].ToString(); lbl_Byte1_val->Text = recv_buff[1].ToString(); lbl_Byte2_val->Text = recv_buff[2].ToString(); lbl_Byte3_val->Text = recv_buff[3].ToString(); } } As you can state I used DjtgPutTmsTdiBits function to pass CFG_IN instruction (because it affects both TMS and TDI) I can control executing of the each instruction separately using LeCroy software. According to my observation the ensemble of these sequences corresponds to the "golden sequence" that I picked form executing fpga -config-status instruction in Xilinx SDK that is supposed to do the same thing. Despite the fact that both sequences (picked from execution of my code and that, picked from execution of fpga -config-status), the result is not the same: I display the content of the FPGA status register in lbl_Byte0_val ... lbl_Byte3_val windows form controls ... and can state that this value (unfortunately) is quite different from that, obtained from fpga -config-status. Sincerely, Pavel.
  9. Yes, it was exactly the case ! The time laps between 2 consequent function calls are so long (why ?) that the 2nd call occurs outside of the time scope, covered by LeCroy software. I've modified a little my code in order to follow step-by-step the JTAG sequence: So, executing each instruction separately, I can control what is going on at JTAG lines.
  10. Hello Zygot, Probably I was misunderstood. I'm not interested in USB aspects of JTAG-SMT2™ module. I consider that the instruction I send over USB cable are properly translated in sequences on JTAG lines. And it's JTAG aspect that I'm interested in. Unfortunately I didn't find any other approach to communicated with FPGA over JTAG. Well ... there is some Tcl instructions in Vivado and SDK, but it's even worth ... while Digilent provide some documentation on Adept software with a couple of examples, Xilinx doesn't provide any examples. Sincerely, Pavel.
  11. Hello, Is there some way to contact author of Digilent Adept JTAG Interface (DJTG) Programmer’s Reference Manual ? This manual is literally unusable: crucial lack of information in virtually every chapter ... the author introduces a new concept (e.g. Batch Operation) and doesn't explain how it can be used ! Incredible ! Thanks.
  12. Hi Jon, Thank you for feedback. Have you looked through the PDF documents in the Adept SDK folder? Sure, I did it ... and examined two examples dedicated to JTAG control. Here the problem does not concern a particular development board (ZC706 or one else). Xilinx development boards let's say medium range (probably also "high-end" boards) use Digilent JTAG-SMTx modules as principal programming interface (at least ZC706 (Zynq-7045) and KCU105 (Kintex Ultrascale) that I'm working with, use JTAG-SMTx). So, the problem concerns rather manipulating of the JTAG-SMTx using Adept SDK. As I showed in my previous mail, the 1st function call (DjtgPutTmsBits) produces activity on JTAG lines (TCK and TMS) while 2nd function call (DjtgPutTdiBits) has no any effect. And yet my control sequence is done in full compliance with table 6-2 of the example taken from the Xilinx Series 7 configuration guide. So, either the sequence from table 6-2 is erroneous, either I misinterpreted it with Adept SDK and 1st function call (DjtgPutTmsBits) didn't put JTAG TAP controller in Shift-IR state, the state where CFG_IN instruction is executed. As you can state from waveforms in LeCroy Logic Studio software (I connected the probes of LeCroy logic analyzer directlly to the JTAG ports of JTAG-SMTx) the DjtgPutTdiBits call (2nd function call) has no any effect ... even on TCK line I don't see any pulse. Sincerely, Pavel.
  13. Hello, Here is extract of JTAG sequence for reading status register of Zynq-7000 (picked from UG470 - 7-Series configuration guide): Here is fragment of my code for executing: 1st step (until Shift the first five bits ...) the beginning of 2nd step (just Shift CFG_IN instruction) Declaration part: HIF hif; char jtag_version[20]; BYTE move_Shift_IR[] = { 0xDF, 0x00 }; BYTE shft_CFG_IN[] = {0x11, 0x08, 0x00}; Execution part: private: System::Void button1_Click(System::Object^ sender, System::EventArgs^ e) { DjtgGetVersion(jtag_version); if (!DmgrOpen(&hif, "JtagSmt2")) { printf("Error: Could not open device. Check device name\n"); ErrorExit(); } if (!DjtgEnable(hif)) { printf("Error: DjtgEnable failed\n"); ErrorExit(); } // Put JTAG in Shift-IR state if (!DjtgPutTmsBits(hif, fTrue, move_Shift_IR, NULL, 10, fFalse)) { printf("DjtgPutTmsBits failed\n"); ErrorExit(); } if (!DjtgPutTdiBits(hif, fTrue, shft_CFG_IN, NULL, 6, fFalse)) { printf("DjtgPutTdiBits failed\n"); ErrorExit(); } I control execution of the code with LeCroy logic analyzer and when I look at waveforms I feel a little embarrassed: 1st step is visible while 2nd - not at all. Any comments ? Thanks. Pavel.
  14. Hello, I've tried TestAdeptDLL project from the solution. Doesn't work: namespace Digilent isn't recognized (directive using Digilent;) and consequently the types that are apparently defined in this namespace (e.g. AdeptDeppDevice) also aren't recognized. Any comments ? Thanks