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NAEastland last won the day on June 9 2016

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  1. Basic Bare metal application not loading on Zybo

    Hey Axe, There may be a quick solution that jumps out from those screen shots, but it's not readily apparent to me. Can you provide a link to the specific project you are following? If I can create the project or recreate the issue you are having hopefully we can find you a solution quickly. -Nate
  2. How to interface USB Keyboard to Zybo board

    Hey Rohit, The USB host functionality on the Zybo runs between the multiplexed IO at the ARM processor to an IC at the USB OTG port. The communication between this PHY and the processor is not something that I would recommend trying to develop yourself. The fastest way to getting peripherals interfaced with the board would be to run an embedded Linux image on it, for which there already exists drivers that would handle communication with various USB peripheral devices (something through PetaLinux would be quick to implement). If, however, you are trying to bring in an existing design that is written all in programmable logic and uses a PS2 controller you have already written, then you would need to grab something like the PmodPS2, which would allow you to enable your controller in the FPGA. I may have assumed the specifics of your project incorrectly though, so if this does not get you pointed in the right direction please let us know what your specific usage is so he can better help you. -Nate
  3. Max32 pin on J15,,J8,and J9

    Hey btb4198, The silk screen is a bit cramped and the header is one solid piece, so it is a bit hard to tell what's what. So the top two pins of that header are indicated as J6 and they do provide 5V. Similarly, the two bottom pins of the header are tied to ground and are marked as J15, so the second to last row are in fact pin 52 and 53 as you indicated. The pins in the rest of the header are split in two schematically. Header J8 includes the lower set of pins (from 38 to 53) and header J9 includes the upper set of pins (from 22 to 37). I hope this helps! -Nate
  4. Counter, synthesize problems

    I think for this example it might be helpful to frame what it is that is going on with your code. I am not sure this is correct, but I am assuming you are worried about a 'false' reset, meaning that the reset signal x1 is still high when the clock triggers the block. You can add another variable in your reset condition that indicates if x1 has been de-asserted, 'AND'ing those two signals together. This is just a suggestion though if you want to keep the design asynchronous, and I would encourage you as well to consider using synchronous resets if you can. -Nate
  5. Cerebot 32MX4 With PModCls

    Hey Can, I'd say your best bet would be to use the MPLAB X IDE for programming the Cerebot. It'll require a bit more work (determining register configurations and such) but you'll be able to program it with that. MPIDE would be more convenient if you just wanted to run a demo and tweak it a little, however the Cerebot will need to have a boot loader installed in order for you to program it with MPIDE. The boot loader is loaded during manufacturing for the successor to the Cerebot 32mx4 (the chipKIT MX4 Pro), however I am not certain if the Cerebot is compatible with the boot loader for the MX4. If you want to give it a try (just to make MPIDE or the Arduino IDE possible programming options) there are some instructions on page 4 of the MX4 reference manual that you can follow to see if it'll take it. The other files you may need for programming it with MPLAB X are the DSPI library and Board_defs.h and .c (possibly helpful) for the Cerebot. The DSPI folder in the MPIDE files is located under hardware/pic32/libraries, while the Cerebot files are under hardware/pic32/variants/Cerebot_32MX4. Between these and the example code Dan linked to you should have everything you need. I have not personally played with the PmodCLS myself, but I have gone through a similar process to get the PmodOLED to work through MPLAB X and it was fairly straight forward once the tools were set up. I hope this was more helpful than confusing, but let us know if you have any other questions. -Nate
  6. I just got my Analog Discovery 2

    Hey jcdammeyer, Welcome to the forum, and it's good to hear you are enjoying your Analog Discovery 2! To your question, I believe the calibration routine is not intended to be run with 10X probes connected to the AD2 (the last time I ran it the prompts were for direct connections between various channels of the AD2). We were able to replicate the issue you are having. With both probes set to 10x (for your bench scope and the AD2) as you mentioned is when the erroneous reading occurs, however it only appears to be an issue with that case and not when either probe is set to 1x (at least in our replication here). I am not certain why it's doing this, but perhaps someone who is a bit more familiar with the inner workings of scopes could provide some insight if you begin another thread in the Scopes & Instruments section. Regards, Nate
  7. Integrate JTAG-SMT2 module onto custom board

    Hey Beamer, Sounds like a pretty cool project you're working on! I have spoken to one of our engineers for some clarification on a couple of your questions. So to answer your questions: The short answer is no, unfortunately. There may be some type of example project in the future, but at the moment I am not aware of any that will be available soon. As for simultaneous communication with SPI and JTAG, this specific module does not support that. I have been told that we do have a chip on certain products that is capable of supporting both simultaneously (on the Nexys Video for instance), but this one cannot. There are a couple points for your question here. First, depending on the Linux distro you are using, you could possibly be able to use Adept 2 SDK, however there are many varieties for which it will not work. I am not intimately familiar with all of its dependencies so I can't really speak to what you should look for to determine compatibility. Second, after asking the engineer who wrote Adept, it seems that it was only written to support a specific subset of Xilinx FPGAs, so it will not be able to program something like an UltraScale chip. I don't believe there would be any other software you would need, provided the prior answers don't render this question a nonissue. Yes, the 30 MHz speed is supported for both communication ports. Sorry for not having a whole lot of optimistic answers for you. If you are set on using a microcontroller to configure an FPGA you may look into the Slave Serial Mode for configuration of 7 series FPGAs. This is a mode that supports direct configuration from a microcontroller, and while I am not sure this configuration option is supported with the specific chip you are planning to use, it is worth looking into. I found the configuration document for the standard 7 series chips here. Also, if you are not totally set on this particular chip set, I might suggest looking into the Zynq UltraScale+ chips if you need a processing system and FPGA component to your project. I hope this helps! -Nate
  8. Petalinux for ZYBO

    Hey Mehdim, There is an Instructable that is being written right now for implementing the Linux BD from the Digilent repo on the Zybo. I'll include the link in this thread for you once it is up. We are still at a stage where we are planning out our PetaLinux support material, but more will be coming soon! Regards, Nate
  9. Using the USB port in host mode zybo

    Hey David, The USB OTG port is accessible through the processing system and not the FPGA portion of the Zynq chip, which is why you did not find anything for it in the .xdc file. You'll need to implement a Zynq block into a block design to make the processing system peripherals available for usage (USB-OTG, ethernet....possibly another). I'm not sure what functionality you need with your project, but there is a brief intro guide for the Zybo that we have. It does not use any peripherals, but it can serve to give you some insight into how you can leverage the processing system of the Zynq chip. Are you looking to simply use the keyboard as an input device? -Nate
  10. how to decompile dtb file?

    Hey Dakefeng, There is a way that this can be done in Linux. There is a utility called 'device tree compiler' that can compile .dts files into .dtb and vice versa. Xilinx has a wiki page that talks about this and its usage a little bit. I'm sure a quick search could also find you some more detailed information about it, but it is possible to do! -Nate
  11. Hello, community!

    Hey Hex, Welcome to the forum! It's very cool to hear about your endeavor to get your school to incorporate FPGAs and digital electronics into the curriculum. As you may be aware, electronics education is sort of our thing. Your validation project sounds quite neat as well! If you find yourself in need of some assistance, feel free to post any questions you might have and we will be happy to help. Good luck with your first year studying EE, you made a good decision (I'm slightly biased). Regards, Nate
  12. where is the documents for petalinux development?

    Hey Dakefeng, I'm not 100% certain what to suggest for you as far as a guide for playing around with GPIO. Is there any particular feature you are interested in at this point, or that you are looking to add into a project? For PetaLinux development materials specifically, Xilinx is going to be you primary source. We have only recently begun developing demos and projects with the PetaLinux tools, so any extensive guides we may produce are currently forthcoming. Presently, the best suggestion I have for you as far as offline reading goes would be the various pdfs that Xilinx has created for PetaLinux development (the links are below). From what I have gone over of them so far, there is useful information about the tools and development process to be taken from each of these. Hopefully these are helpful, and let us know if you end up finding any other interesting tutorials! PetaLinux Reference Guide PetaLinux Getting Started Guide PetaLinux Workflow Tutorial -Nate
  13. Petalinux on Genesys 2!

    Hey Iwan, Thank you for sharing! I'm eager to check out your project, it'll be the first time I've seen a Microblaze project running Linux. -Nate
  14. strange error may because of shell?

    Hey Dakefeng, Sorry for the delayed reply due to the long weekend. As you have observed, the recommended shell for PetaLinux is Bash. I am not certain what you mean by making a link from bin/sh to bin/bash, however there are a couple ways to change the default shell. If you haven't already, I would suggest using the chsh command and linking to /bin/bash, such as chsh -s /bin/bash There are a handful of other dependencies that PetaLinux has that are easy to overlook. The PetaLinux reference guide has a list of packages you should install in order for the program to run properly, starting on page 9 I believe. -Nate
  15. Hey Herrmattoon, The linux_bd project does have support for ethernet. The control of ethernet as an IO option is within the Zynq IP block itself and is enabled within this project. To your second question, sourcing the PetaLinux and Vivado tools means running the source command in your terminal pointing to the settings files of each. If you were running 2015.4 for instance and your Xilinx installation was in the opt directory, you would type something like: source /opt/Xilinx/Vivado/2015.4/ and for the PetaLinux tools you would do something similar for your installation directory for that, like: source /(wherever you installed Petalinux)/2015_4/petalinux-v2015.4-final/ From what I understand, running the PetaLinux tools (commands like 'petalinux-config' or 'petalinux-build' for example) can require access to specific things within the Vivado toolchain, so in order for PetaLinux to operate within the terminal environment you are running, you will need run these source commands. Someone who has a bit more knowledge about this can possibly provide a more articulate explanation, but that is pretty much the short version. -Nate