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Everything posted by greedyhao

  1. Hi @jamey.hicks I had edited my question to post a screen of failing path. The error point to an IP called lms . But the IP core is provided by Zynq book.
  2. Hi @n3wbie, Thank you for you help. But setting clock group seems like not working.
  3. Hi @n3wbie, Thank you for your reply. I had looked through the link you offered. But I still don't know set which two clock into a group. Please forgive my poor knowledge of the fpga. Regards,
  4. Hi @jpeyron Thanks in advance. I'm sorry to reply so late because the time in China is time to sleep. Here is my block design:
  5. Hello, When I following The Zynq Book Tutorials(exercises 5b) , I met a error unfortunately. It says that 'Timing constraints are not met.'. I have no idea how to solve it. Could anybody do me a favor. timing_1.rpx ------ More detail shows below:
  6. Hi, @BogdanVanca I am extremely grateful to you for your help. I found that my GPIO interface incorrectly configured to btns 4bits. After I changed it to leds 4bits, it works fine. Regards, Hao
  7. Hello, I am new in zybo. I am using Vivado 2018.2. The platform is Ubuntu 18.04. I met a trouble when I following the Zynq Book Tutorials, the first exercise , step by step. The tutorial seemed to be fine before I launched the program on hardware(GDB). The LED didn't blink at all. I googled for a while, but no results Here is the picture of my board. The following is my SDK Log. 12:11:42 INFO : Connected to target on host '' and port '3121'. 12:11:42 INFO : 'targets -set -filter {jtag_cable_name =~ "Digilent Zybo 210279539437A" && lev