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  1. Like
    Commanderfranz reacted to Bianca in Nexys video signal integrity information   
    Hello Toby,
    Unfortunate, we cannot provide the full layout of the board and we do not have hyperlynx models of the lines. What I can tell you is that it respects the FMC standard 50Ohm impedance for single ended and 100ohm impedance for differential traces. 
    Also I can give you the traces length for the FMC connector so you can calculate the speed.
    Attached here you can find the traces length. I hope this helps!
    Best regards,
  2. Like
    Commanderfranz reacted to elodg in zybo/zedboard standalone USB mass storage example   
    Hello Andrew,
    We don't have any such examples. We do test SD and USB in our manufacturing tests, but it does not go as far as knowing anything about files. For both SD and USB Mass-storage you will need file system support. FatFs is a good open-source example. The lower-level drivers are the ones provided by Xilinx and we use them ourselves. For example, reading the first data block on an SD is as simple as:
    #include "sdps.h"
        /// Initialize the read buffer
        memset(arrbyReadBuff, 0, kwBlockSizeBytes);
        /// Initialize SDIO controller
        psSdConfig = XSdPs_LookupConfig(XPAR_PS7_SD_0_DEVICE_ID);
        if (XSdPs_CfgInitialize(&sSdPs, psSdConfig, psSdConfig->BaseAddress) !=
            VERBOSE("%s (line %d) error", __func__, __LINE__);
        /// Initialize SD card
        if (XSdPs_CardInitialize(&sSdPs) != XST_SUCCESS)
            VERBOSE("%s (line %d) error", __func__, __LINE__);
        /// Change bus width to 4-bit
        if (XSdPs_Change_BusWidth(&sSdPs) != XST_SUCCESS)
            VERBOSE("%s (line %d) error", __func__, __LINE__);
        /// Issue a read of the first block (boot block)
        XSdPs_ReadPolled(&sSdPs, 0, 1, arrbyReadBuff);
  3. Like
    Commanderfranz reacted to TommyK in Arty_GSMB Memory Interface Generator   
    The tutorial has been updated. Good luck!
  4. Like
    Commanderfranz reacted to Bianca in Analog Discovery NI vs Digilent version   
    All the devices Analog Discovery 1, Analog Discovery 2 and Analog Discovery 2 NI edition are supported by Labview. 
    Best regards,
  5. Like
    Commanderfranz reacted to Bianca in JTAG-USB Cable Connector   
    The header pin is a 1x6 female connector with 100 mils pitch. You can find here a document about the PMODS we have and the connectors we use.  
    Best regards,
  6. Like
    Commanderfranz reacted to mwingerson in spartan-6 LVCMOS33 pin but output = 1.8V !   
    Hello Maikon,
    How big of an LED are you using?  What is the voltage drop and current rating?
    It sounds like you are just pulling too much current through the pin and this is causing the line voltage to drop.  
    I searched online really quick and found this calculator that might help you.
    I would suggest using a power FET or BJT to protect the FPGA if you are using something other than a small LED. 
    Best of Luck,
  7. Like
    Commanderfranz reacted to Bianca in Zedboard Schematics Source Files   
    Unfortunately we cannot release schematic/pcb files for our boards. The information we can offer is already public on our website. The schematic of the board is public but only in PDF format here
    Best regards,
  8. Like
    Commanderfranz reacted to eGeek in CoolRunner II Documentation ERROR   
    The CoolRunner II Starter Board Reference Manual does not follow the Schematic. Section 4 depicts the that the 4 LEDs are driven by the CoolRunner though the schematic indicates other wise.  Is there more?
  9. Like
    Commanderfranz reacted to Cristian.Fatu in JTAG-SMT1   
    Here is a step file for SMT1:
    You can visualize it using any step file viewer, some are available for free on Internet.
    Please tell me if this doesn't answer your question.
  10. Like
    Commanderfranz reacted to rp-prew in analog discovery voltage concern   
    Dear ab,
    Could it be possible to see the circuit that you wired up? it would give us a better view and may help us understand what could be wrong. I did go through and make a quick circuit and I was also getting about 4.8 V. I will read through some of the reference manual to see if there is a reason for this. if you could post a picture of your set up that would be fantastic.
  11. Like
    Commanderfranz reacted to JColvin in analog discovery voltage concern   
    Hi ab,
    Just a follow up question on my end. Did you also make sure to enable/turn on the power supplies in the "supplies" section of the Welcome Tab for Waveforms2015? You won't detect any voltage without the positive (and negative if you so choose) enabled.
  12. Like
    Commanderfranz reacted to TommyK in netFPGA 1G original flash   
    Oops, wrong NetFPGA! I think you're going to want to look at this guide on the NetFPGA wiki to reprogram your NetFPGA. The files are hosted on their wiki here.
  13. Like
    Commanderfranz reacted to JColvin in netFPGA 1G original flash   
    Hi rfrm,
    Do you perhaps mean Virtex-II? NetFPGAs don't have a spartan chip on them as far as I am aware. If anybody would have the the files it would be the NetFPGA community. The two places I would look for the files would be both here and here.
  14. Like
    Commanderfranz reacted to ColoradoAnalog in Arty GPIO demo UART communication   
    I'll put this here just in case anyone else searches for this. I had to change the port number to get it to work. I found out what the port number was by looking (in Windows 7) at Control Panel > Hardware and Sound > Devices and Printers > Unspecified > Digilent USB Device, then right click and select Properties, then go to the Hardware tab. Here it shows that it is using COM7. After I changed the port number to 7 and reprogramming the FPGA the UART communication worked.
  15. Like
    Commanderfranz reacted to AndrewHolzer in Genesys 2 FT2232H   
    Hi Jensen,
    Are you trying to directly communicate with the FT2232 chip and forgoing Adept SDK? 
  16. Like
    Commanderfranz reacted to JColvin in RPi and Digilent PmodDA2   
    Hi Matthias,
    The bitstream that the PmodDA2 expects to receive is nicely outlined in it's reference manual here, with the first two bits as 'don't cares', the next two bits as values to set some features of the on-board chip, and the remaining 12 bits as the datastream (MSB first). Likely you will want the first four bits to all be 0's for normal operation, which is why the library doesn't seem to have anything significant about transferring data to the PmodDA2.
    The TI chip (DAC121S101) is active LOW, and looking at it's datasheet on page 9, it looks like to me that it follows (using the PIC and ARM convention) SPI Mode 1 (CPOL = 0, CPHA = 1).
    Let me know if you have any more questions.
  17. Like
    Commanderfranz reacted to Cristian.Fatu in Dangerous Switches On Mde-8051 Trainer (usb) Rev B   
    We confirm the described behavior and we apologize for this.
    Indeed, connecting the switches straight to the microcontroller pins is dangerous. An alternative would be using series resistors instead of wires.
  18. Like
    Commanderfranz reacted to Armel in Analog Discovery 2: make a cable with labels & male pins   
    Here is a simple suggestion to improve the Analog Discovery 2: make a cable with labels & male pins.
    There is a nice example with this one for Bus Pirate V3

  19. Like
    Commanderfranz reacted to sbobrowicz in Arty: Selectable 2.5V I/O bank(s) for LVDS   
    Hi Scott, welcome to the forum.

    Thanks for the feedback, we agree that adding an option to power the high-speed pmod signal lines at a lower voltage would be a good feature add. Unfortunately, implementing it on Arty would take a significant reorganization of the layout and FPGA bank connections for several onboard devices. This means it is not likely to be designed into a future rev, where we typically only make changes for fixes and minor-tweaks. We will certainly consider it on future boards though.

    On the Arty pmods, one thing you could consider trying for high-speed differential output is to use the TMDS_33 IOSTANDARD. TMDS is a current-mode logic (CML) interface that we use for driving our HDMI input and output ports. This document explains how you could get away with connecting a CML output (such as TMDS_33) to an LVDS input, assuming the LVDS device can support a common-mode range up to 3.3V. 

  20. Like
    Commanderfranz reacted to mwingerson in USB to SPI   
    Hello Sai,
    If you want to verify the states and values inside the FPGA then you are asking about is ChipScope which is fairly expensive if you don't have a license.  Plus you should be able to get most of the same output by printing through a serial port. Personally, I find ChipScope cumbersome, so I would suggest setting up a serial debugging solution.
    If you want to see the values outside of the FPGA then you can pin them to a Pmod header and use a logic analyzer to look at the data being sent over SPI.  I usually use the Analog Discovery or the Electronics explorer board for a login analyzer.
    In case this is unclear, you want to add a bus-to-uart core to your design and send the UART data out of a pmod header.  Then with another device, capture the UART data and collect it on a PC.  That data will be a log of what is happening on the bus that the bus-to-uart core is attached to.  Since you are using the USB plug to interface with the FPGA then I would connect a UART-to-USB converter.  There are a ton of options: PmodRS232, another FPGA, an Arduino/ChipKIT or another serial to USB converter.  
    A good core for the bus-to-uart can be found here:
    Best of luck,
  21. Like
    Commanderfranz reacted to JColvin in USB to SPI   
    I'm definitely interjecting a random thought here, but would the Vivado's Virtual I/O IP block that hamster talks about here be a viable replacement for ChipScope? From my limited experience it sounds like it does something very similar...
  22. Like
    Commanderfranz reacted to AndrewHolzer in USB to SPI   
    It's good that you brought that up, JColvin. I've had some experience with the VIO core and I believe that it along with the ILA core could provide suitable in-fabric scoping. These two cores together provide powerful debugging tools for your design. I will say that I've only worked with the two cores and not ChipScope, so my views are more than definitely biased from my experience, but I'd highly suggest that anybody interested in internal signal analysis look at how to use the cores.

  23. Like
    Commanderfranz reacted to Cristian.Fatu in Pre-Purchase Questions on Nexys Video Board   
    Hello Garry,
    I paste here the information I wrote you through Digilent technical support channel. 
    We consider that you took a good decision migrating towards Xilinx tools and Digilent boards in order to use Xilinx FPGAs. We are here to help you, so please write us your questions.
    And here are the answers for the questions you already posted:
    Does this product include a target specific version of the development environment that allows for design in VHDL?
    You can use our boards with Xilinx tools: ISE tools and Vivado. We recommend Vivado as this seems to be the direction that Xilinx will follow in the future.
    Both ISE tools and Vivado allow VHDL design and also offer a free version, called Webpack.
    My application needs to use FFTs but I cannot figure out what the utilization per instantiation will be in this device and how much, if any, it will cost for the FFT IP that I can use with this board.
    Vivado offers a FFT functionality (as FFT IP), to be used in your design. It is available even in the free Webpack version.
    FFT Core is available in the Vivado IP Catalog.
    Vivado also allows a lot of FFT Core customization:

    You can find an example of how FFT is used in one of our projects presented here:
    There you can also find project sources and instructions about installing Vivado.
    Apart from a host computer, what else must I buy to be able to develop VHDL and test VHDL in the Nexys Video?
    You just need to install the Xilinx tools. As I mentioned above, the free (Webpack) versions of Xilinx tools are available, and quite powerful.

    Best Regards,
    Cristian Fatu
  24. Like
    Commanderfranz reacted to JColvin in Pre-purchase question about FPGA boards and Waveforms   
    Hi DrK,
    All of our FPGA boards that Digilent currently offers are capable of SPI communication and have 20+ IO pins. At this point, (I'll confirm this and let you know otherwise if this isn't the case) I do not think NI nor LabVIEW MakerHub has designed any VI's or firmware to be able to program any of our FPGA boards. From what I can see on the LabVIEW MakerHub website, LINX only supports this list of Digilent boards, including the chipKIT WF32.
    Let me know if you have any more questions.
  25. Like
    Commanderfranz reacted to rp-prew in NI Circuit Design Suite Installations   
    Dear mb7270,
    I had to do some research about this software. This is a NI academic product so I do not have all the information I would like to have to answer this question. What I have found may be able to answer. Looking at the full version of Multisim software on NIs website I have found that when you purchase that program you will get a product license which you would input into an account on NI. From there you would be able to down the program and then use your account license to be able to use that program. It appears you would be able to upgrade to a new computer and use that license on the new computer. That information is for the the Full-edition of Multisim. While I do not know if that applies to the student edition I do have a recommendation. If you go onto the NI website and go to their forums or contact their sales department they will be able to give you a more complete answer. I hope this helps.
    Best Regards,