thobie

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  1. Thanks for the explanation and valuable information! I couldn't find errata for the Zybo boards (atleast from the reference manual) - could this be included in the errata to for example the reference manual? This has emerged discussion in several discussion boards, and no clear answer given before your explanation.
  2. Digilent, if you sell these as an education boards or self-learning purposes you must provide support files which are up-to-date. Additionally missing half of the equipment needed for proper operation (microUSB cable, microSD card, additional power-supply to get rid of 500mA USB-limit not included in the package) is not either good practice at all - huge amount of extra work for students & personell. Zybo Z7 Out-of-Box Demo (Vivado 2016.4 Source) is not working with any up-to-date Vivado version, could Digilent or anyone else provide the actual packaged Vivado project files (which Vivado is able to update by itself) instead of .tcl script (which is not running on any other version than 2016.4)? Digilent Board Files for Zybo Z7-10 is not up-to-date with Vivado 2018.2 version: [PSU-1] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 has negative value -0.050 . PS DDR interfaces might fail when entering negative DQS skew values. [PSU-2] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 has negative value -0.044 . PS DDR interfaces might fail when entering negative DQS skew values. [PSU-3] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 has negative value -0.035 . PS DDR interfaces might fail when entering negative DQS skew values. [PSU-4] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 has negative value -0.100 . PS DDR interfaces might fail when entering negative DQS skew values. Please fix these issues.