Robert Finch

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  1. In the past I made composite interface cable using a four bit r-dac and an RCA jack. It worked okay, but wasn’t quite good enough to get a stable colour picture (It needed a colour burst filter). Pmod VGA looks interesting but I don’t want to use any more than a single six pin Pmod port for the display. I was going to concoct my own board to interface to VGA using a single six pin Pmod port, by using a high speed serial (8x) to parallel converter on the board. The serial to parallel would be fed two bits at a time at 100MHz, for 16 bits available in parallel at 12.5 MHz rate. Good enough for a
  2. Yes, an IBUFDS is being used. The problem has disappeared however. It may have been a bad parameter to IBUFDS a zero was passed instead of "FALSE". I've been editing files, and the last system implementation didn't complain.
  3. Does anyone know of a small board available to interface to composite video ? High resolution is not required, but a small signal count would be good. I'm thinking of a small Pmod-like board that has a colorburst filter, 3 bit dac (so there are four input signals total) and maybe a couple of output transistors.
  4. I'm trying to use the HDMI input port on the Nexys Video board and I get an error(s): [DRC 23-20] Rule violation (IOSTDTYPE-1) IOStandard Type - I/O port TMDS_IN_data_n[0] is Single-Ended but has an IOStandard of TMDS_33 which can only support Differential The hdmi output works fine. Here is what is in the .xdc file #HDMI in ##set_property -dict { PACKAGE_PIN AA5 IOSTANDARD LVCMOS33 } [get_ports { hdmi_rx_cec }]; #IO_L10P_T1_34 Sch=hdmi_rx_cec set_property -dict { PACKAGE_PIN W4 IOSTANDARD TMDS_33 } [get_ports { TMDS_IN_clk_n }]; #IO_L12N_T1_MRCC_34 Sch=hdmi_rx
  5. I'm looking at using the display port output on the Nexys Video board, as I'm planning on using the HDMI input/output to communicate between boards. Currently I have a WXGA circuit interfaced to the rgb2dvi circuit for display. The display is 1280x768 running with an 80MHz pixel clock. How hard would it be to modify things for display port ? I see the capture_test.vhd core for 800x600 video. Can I just feed this core the 1280x768 timings ? Is there an interface to VGA ? Or will I have some work to do ?
  6. Figured it out. The I/O ports weren't wired up to anything. When the design was ported from DDR2 to DDR3 the internal DDR2 signal names didn't get updated to DDR3. The system builds to bitstream generation now.
  7. Okay, that didn't work. Same results. I post all the placer errors in case there's a clue as to what's going on. I note that it doesn't pick up the differential clocks either. What I did was include the mig_7series_0.xci file from looper into the new project along with the stub. I also copied the contents of the .xdc file. The looper project itself builds without any errors. Since this is just using the same component in a different project I don't understand why there are errors. Place Design [DRC 23-20] Rule violation (IOSTDTYPE-1) IOStandard Type - I/O port ddr3_ck_n[0] is
  8. Hi, I'm trying to use the DDR3 controller from the looper project in another project and there are a whole bunch of placer errors when the design is placed. Why is the signal unplaced when the placement is specified directly in the .xdc file ? [Place 30-69] Instance umpmc1/u_ddr/u_mig_7series_0_mig/u_memc_ui_top_std/mem_intfc0/ddr_phy_top0/u_ddr_mc_phy_wrapper/gen_dq_iobuf_HR.gen_dq_iobuf[0].u_iobuf_dq/OBUFT (OBUFT) is unplaced after IO placer Example .xdc line: set_property SLEW FAST [get_ports {ddr3_dq[0]}] set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {ddr3_dq[0]}]
  9. Can ttl level signals be directly connected to Pmod ports ? There's a TTL level serial interface with Rx, and Tx that needs to be interfaced. I think the Rx pin can be driven by the pmod port, but I'm not sure about the incoming Tx. Would the series resistors on the Pmod port (200 ohm) be enough to absorb the voltage difference ?
  10. Hi, I'm hoping to PWM an extra bit(s) out of the LSB of the VGA DAC on the Neyx4ddr board so I'd like to know what kind of bandwidth the VGA DAC has. On the schematic it has a 4k resistor, but what's the capacitance ?