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About kampianakis

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  1. Thank you for the quick reply! I managed to get the source files, synthesize etc but I seem to have a problem with the cable drivers. Just a heads up, I have never downloaded anything to a CPLD so I am completely new to the process. I have some experience simulating VHDL but that's it. What I am doing is double-clicking on the "configure target device" button and a program called impact pops up. I add my device after I press the boundary scan and then I press Program. Then I get this: WARNING:iMPACT:923 - Can not find cable, check cable setup ! Which is expected since I got an error after I installed ISE that the cable drivers weren't installed. This seems to be a very common problem but can't find a solution for it. Oh I forgot to mention. My setup is on Ubuntu 14.04 64 bit and I have the Webpack ISE 14.7. Any links/info on how to install the drivers would be great. Also any other links or help on how to download this basic example to my device would also be great. If it matters I got the version 'F' of the CPLD starter board. edit: I followed the instructions here: http://elinux.org/Install_Xilinx_USB_cable_drivers_for_Ubuntu and I went to the "cable setup" from the menu on impact and selected the Digilent USB JTAG cable and I am getting this: WARNING:iMPACT - The cable selected is not avaliable, please select a different one. (Typo included) Thanks!
  2. Hi everyone, I know that the CPLD starter board that features the XC2C256 is deprecated but can someone provide a few links with a "hello world" application? A blink LED or anything to get me started and at least check if I have my toolchain set up properly. Also, I am using xilinx ISE webpack but a few people have mentioned that vivaldo might be a better choice because xilinx doesn't support coolrunner anymore through webpack(?). I see the devices on the device list so I don't understand why I should use vivaldo. Thanks!
  3. Same questions here. Also, what is the memory of the Xilinx CoolRunner II CPLD if any and what is the fastest clock that I can drive it with? Thanks! Lefteris
  4. Hello Mike Thanks for your reply! So I have a few specification updates on my end. I just realized that it would be highly convenient for my application to have a programmable device that can retain its memory/functionality regardless even when it is rebooted. I know that FPGAs cannot do that, at least with a default setup. However, some USRPs from Ettus can store the FPGA binary file to some sort of non-volatile memory and retain the same functionality even after power-down. Do you know the configuration with which I can achieve such functionality?Since, at least initially I don't want to do something other than shift bits to a transistor basically, I was thinking of CPLDs but I don't think that CPLD's can match my rate specifications. Also I know that I can use the Webpack to program CPLDs but has anyone had any experience with the toolchain? That said​ , let me answer your precisely put questions: 1) Will you eventually need some way of interfacing to a PC or laptop to send near real-time sequences? Nope. In the first phase of my project I will just save a set of pre-stored data and shift them out really fast to my modulator. The next step would be to encode the data but again the encoding will involve pre-saved data. 2) What clocking signals will your design need? The end-goal of the project is to produce symbols with a rate of 96 symbolspersecond /16 bitspersymbol = 6Mbits/sec. In other words, the rate at which I will need to control my output ports will actually be 6MHz not 96. Sorry for not clarifying that. So I think there is a lot of freedom to convert a 100MHz clock to 6MHz (I think). 3) Good question. I think I will this will be an issue since even 6MHz might be to much for the connectors. "Too much" = I will experiment with different modulators and some of them may have issues with the parasitics that may be introduced from the non-RF specified connectors. Thanks! Lefteris
  5. Hello Alex Sorry for the late response and thank you for your reply. I just re-read my post and I have not made my self completely clear so I am going to give some more details about my project. I don't want to refresh my digital/hardware design skills. I have a very specific project in mind that is part of my deliverables as a PHD candidate in EE. This project regards the development of the emulator for a 16-QAM backscatter communication modulator that operates at 96Mbits/sec. The backscatter modulator is described here: https://www.dropbox.com/s/s22pjxfg4xy52oy/06193049.pdf?dl=0 What I want to develop eventually is the logic that drives the RF SP16T switch that generates the symbols. First I will start with the simple case of a BPSK modulator that controls a single RF SPDT to emulate the functionality of the BPSK chip that was developed here: https://www.dropbox.com/s/zgnyt12b3iaxxrt/06107769.pdf?dl=0 I will start with something simple like having some pre-saved data in memory and shifting them out to the modulator (SPDT) and move on to somewhat more complex logic like Hamming(16,11) and manchester encoding of the pre-saved data. http://en.wikipedia.org/wiki/Manchester_code http://en.wikipedia.org/wiki/Hamming_code Then I will move on to the project that controls the logic for the SP16T for the QAM modulation. Now I don't think I will require very complex or large FPGAs since, at least initially I will only need a few shift registers and few kB of memory. After that the Hamming and manchester encoding shouldn't require much logic either. I am asking for help because I don't know what to buy from Digilent that would be easily programmable/debuggable and I am also asking for the toolchain that can provide that as well. Sorry for the dropbox links but the papers are on IEEExplore and I am not sure if everyone has access to them. Thanks Lefteris
  6. Hello everyone, I am interested in purchasing a simple developing board to develop (more or less) an RFID emulator. Basically the chip only has to drive an RF SPDT connected to one of its pins based on some logic that I will implement. Initially I will just just need to have some data (2-3 kB) saved in memory that I will encode using Hamming(16,10) and send it to the SPDT with a rate of 5Mbits/sec. I am fairly new to FPGA developmen and although I have written some VHDL (a simulation of the tomasulo algorithm, a simple ALU during my undergrad), I consider myself a complete newbie. Do you guys have a recommendation for an FPGA dev kit with a simple programming interface(e.g. USB), preferably compatible with linux AND windows machines? I suspect that the logic that I am going to download will not occupy too much space so I don't need a large in terms of LUT's FPGa but I might need to do some signal processing so I would prefer something with the "newest technology" (talking newbish here). Moreover, I am very concerned about the toolchain, I have used webkit in the past and, well I will just say that I don't expect much from the newer versions. Is there anything better or do you have any suggestions. I am not really concerned about paying for a 1000$ license if I can save a month of bug/driver/compatibility nonsense. I also want to buy PC and I am looking for something that will be able to handle all the driver/connectivity/performance constrains that are associated with the toolchain. I have payed for a 1000$ Dell once with a fake PCIe4 port and I don't want to have the same experience again. see here Thank you very much in advance Lefteris