I'm not sure whether this question should go in the Sales board, or the FPGA board. Here goes anyway:
I'm going to be using a FPGA to:
1. Receive a MIPI transfer from two distinct synchronized cameras.
2. Do some transformation, and output a final stream of same dimensions as single camera.
Total bit rate per camera = 1920(w) * 1080(h) * 90(fps) * 16(bit/pixel) = 2985 Mbps
Total input= 5970Mbs , total output 2985 Mbps
Which Digilent boards (Arty7 ArtyS7, ... etc) are capable of reading and writing this amount of information via IO pins?
Is it true that I the MIPI stream needs to be changed into an LVDS stream via a special chip:
or perhaps something like this: https://toshiba.semicon-storage.com/us/product/assp/interface-bridge/camera-interface.html
Do all the boards support the LVDS of the Meticom or the parallel of the Toshiba? (I don't mean protocol of course, just bit transfer)
Thank you for any information.