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Posts posted by mwingerson

  1. Hello Luc,

    Unfortunately, the Arduino Due is not a supported board for the library. There was some community support and I wrote the framework for the Adruino Due but never got my hands on one to confirm it working or not. As it sounds, it is currently not working. I will update the to do list to reflect that the library is currently not working with the Arduino Due.

    Best of luck,


  2. hey ks0ze,

    I talked to my supervisor and he said that he is escalating the issue. To the best of his knowledge the license that you paid for is exactly the same as the webpack license but locked to the ZYBO. I guess we pulled the license from the store some time ago but apparently after you bought your license. From James it sounds like we are offering RMAs for unused licenses now so if you haven't redeemed it then please contact our support email. Otherwise the issue is being brought up to the right people.



  3. Hello ks0ze,

    Sorry for the delay. Originally this license was supposed to grant you access to a lot of of IP cores and a couple features that weren't included in the standard Webpack license. Since then a lot of features and IP cores were added to the Webpack license diminishing its value. Last time I looked at the usefulness of this license the big value that you were getting was Chipscope. Since I have not kept up with what Xilinx has released under the Webpack license, I will contact Xilinx to confirm what features are included with that license and I will talk with our marketing department to clarify this point on the product description.

    More than anything, we don't want you to feel 'scammed' and if there is no value associated with this license then we need to pull that product and try to make amends with our customers who bought it. Specifically, what license did you buy? The one in the Zybo Accessory Kit, Xilinx Vivado Design Suite Voucher for Zybo or the Zynq SDSoC Development Voucher?


  4. Hello Garrett, 

    I am sorry but we cannot write code for every request that we get. I do know some excellent resources that I used when learning VHDL and Verilog.

    Here is a Digilent associated class that teaches basic digital logic and provides some Verilog examples:

    Here is a great general site for learning VHDL or Verilog (I used it a ton):

    If you prefer a book, here is one written by Digilent (I found it good and worth the money):

    Good luck!


  5. Hi Frank,

    Unfortunately, we designed and produced the UDB board for Microchip and are not allowed to distribute the schematic.  I am unaware of the reason why the schematic is closed source. You could try to contact Microchip to see if they will distribute the schematic but we cannot.

    I did dig through the schematic and found that the IO pins are all wired directly from the IC4 socket to the J6 header. The only reason why you should be seeing ground on those pins are because the PIC is pulling the pins to ground. To confirm this for yourself, you can measure the resistance between the IC4 socket and the corresponding pins on J6. With the board unpowered and the PIC MCU removed. The resistance should be very low between corresponding pins and open between non-corresponding pins.

    Hope this help and good luck!


  6. The  keypad-seven segment demo is strangely complex but the source code for it is fairly straightforward.

    I drew a quick block diagram to figure out what is happening.  

    A simple explanation:

    1. col_cnt is counting from 0b00 to 0b11

    2. the decoder changes the number to an inverted bit location IE: 0b01 -> 1101

    3. The decoded signal from 2 is passed to the keypad_decoder and out of the chip to the keypad itself.

    4. The keypad_decode module analyzes the two incoming signals and produces the resulting value for the location of the button that was pressed. The value is passed to the BRAM

    5. The key_detect module just finds when a key is pressed and enables the write enable on the BRAM

    6. The seven segment decoder is enabled by an external switch

    7. The seven  segment decoder requests data from the BRAM at an address and the BRAM returns the value stored at the requested location.

    8. Finally the seven segment decoder displays the values on the seven segment display.

    Hope the helps!



  7. I try to troubleshoot as much as I can in simulation since troubleshooting in hardware is slow and painful. It is a lot better using Chipscope, if you have a license.

    Here is a demo for simulating a custom IP core in Microblaze.

    It isn't exactly what you are trying to do but the steps on simulating a Microblaze project are there. In simulation you should be able to confirm the design and program.  Most importantly, you want to see that the IIC lines are changing as expected with your design and program. 

    Then move to troubleshooting incoming data.  I would route incoming IIC data to the uart either in software or hardware.  Dealer's choice.

    Best of luck!


  8. Hello Jude,

    You have some challenging questions.  J16 is a header so a secondary battery can keep the security section of the RAM active without the primary 12V source.  To do this, R187 need to be removed otherwise the secondary battery will be powering a good chunk of the board and has a high chance of damaging some components.  In this case the amount of power that will be used through VCCBATT_0 pin should be very small.  I looked through the documentation but I could not find how much current will be pulled through VCCBATT_0 with or without a 12V source.  

    I would suggest contacting Xilinx support or forums to find a more solid answer.

    Best of luck,


  9. You bring up some valid points.  I guess I just have gotten use to not having the instantiate templates and I primarily use Verilog so I didn't notice the VHDL issue.  I didn't know that ISE was working in W10.  is it the same fix a that allowed ISE to work in W8?

    I agree with Andrew.  Use the SRAM to DDR component.  It will save a lot of time.

    Best of Luck,



  10. On 3/8/2016 at 0:51 AM, miguel_rodrigues said:

    Hello jkoller, I verified just now and it is in master-next. Instead of doing

    you should do

    Then if you run

    • grep -r "zybo"

    you will find zynq_zybo.h under /include/configs/

    This is correct.  


  11. I am CCing you on an email to our people for an RMA.  

    I suspect the issue is bad firmware on the wifi module and we don't have a reliable way to reprogram the board in the field. 

    Sorry about the turn around time but we found the issue.


  12. ok, let me see if I can find what the error or status means.  

    What do you mean by "And I still don't check my wifi module on other SPI port"?

    As for, "I only understand that i need inboard programer and try to write wi-fi program using harmony"

    You are programming through the USB port which can talk to the PIC32 during boot up.  So you do not need an external programmer unless you damage the bootloader on the PIC.  You shouldn't need Harmony at all for this.  Harmony is a different implementation and a different IDE.  

  13. Hello Maikon,

    19 minutes ago, maikon said:

    I am measuring the PORTS IO , they are configured as inout and they have IO Buffer connected to them,

    the exactly same project from the website. When there is no load , the voltage is 3.3 V ! When I connect a LED or a LED plus resistors these INOUT ports have its voltage dropped to 1.8 V. Then I tried to set the pin as an output only and again , open is 3.3 V but when I connect a LED is 2.6 V . 


    I might be doing some wrong.  

    How big of an LED are you using?  What is the voltage drop and current rating?

    It sounds like you are just pulling too much current through the pin and this is causing the line voltage to drop.  

    I searched online really quick and found this calculator that might help you.

    I would suggest using a power FET or BJT to protect the FPGA if you are using something other than a small LED. 

    Best of Luck,


  14. Hello Sai,

    If you want to verify the states and values inside the FPGA then you are asking about is ChipScope which is fairly expensive if you don't have a license.  Plus you should be able to get most of the same output by printing through a serial port. Personally, I find ChipScope cumbersome, so I would suggest setting up a serial debugging solution.

    If you want to see the values outside of the FPGA then you can pin them to a Pmod header and use a logic analyzer to look at the data being sent over SPI.  I usually use the Analog Discovery or the Electronics explorer board for a login analyzer.

    In case this is unclear, you want to add a bus-to-uart core to your design and send the UART data out of a pmod header.  Then with another device, capture the UART data and collect it on a PC.  That data will be a log of what is happening on the bus that the bus-to-uart core is attached to.  Since you are using the USB plug to interface with the FPGA then I would connect a UART-to-USB converter.  There are a ton of options: PmodRS232, another FPGA, an Arduino/ChipKIT or another serial to USB converter.  

    A good core for the bus-to-uart can be found here:

    Best of luck,





  15. Hello Anding,

    I would highly suggest moving to Vivado.  It is a small jump but I found it to be a very similar workflow.  I have never tried using the MIG in ISE.  I'm sure it is possible but obviously isn't easy.

    On top of that, we have examples of using the MIG on the Nexys4DDR in Vivado.

    Best of Luck,


  16. I have found that too.  Generally, for the WiFi libraries, I have stuck with WF32 and Wi-Fire for wifi projects because I feel like they are better supported in the libraries.

    Did you figure out your problem with the WifFi stuff?


  17. I have found that there are a lot of issues with the wifi libraries depending the version of the library and MPIDE.  It can be a little bit of a nightmare.  

    I just checked the latest ChipKIT core, to see if it works or not.  The WifiScan ran perfectly on for me on the Wi-Fire.  I suggest installing the latest Arduino IDE and install the chipKIT core.  

    Instructions can be found here:

    Best of Luck,



  18. Hello miguel,

    I am not familiar with Busybox I bet it isn't any different than a standard linux networking.  Have you tried pinging your router or something on your network?  If you can ping a local network device then all you should have to do is set a nameserver in the /etc/resolv.conf file.  It should be something like this:  

    "sudo nano /etc/resolve.conf"





    then reboot or restarting the networking service should fix it.  

    Best of luck!