kwilber

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Everything posted by kwilber

  1. The Digilent proprietary USB UART/JTAG circuity allows for simultaneous jtag and uart use.The board appears as two serial ports. Vivado and the SDK automatically find the jtag port and you can use a communication app like TeraTerm using the other port. The "hello world" example you can create in the SDK demonstrate that. Serial communication with the pc is fairly common.
  2. The Arty board has all the JTAG circuitry plus a USB UART on board. You don't need a special cable - just use a good quality USB to micro USB cable. In the Vivado IPI, when you instantiate a Microblaze core, the MDM is automatically added and connected by block automation. The Xilinx SDK debugger will automatically use the MDM for debugging. You don't have to do anything other than start your program in debug mode. It sounds to me like going through one of the numerous online tutorials would help you get your bearings. Digilent has several including this one.Prolific blogger Adam Taylor also starts a series of posts on the Arty here. And if you like watching videos, Jeff Johnson at FPGADeveloper.com has this one.
  3. For those interested, Xilinx has just made a new Zynq MPSoC ebook available here.
  4. The uart and jtag circuitry is proprietary and in not shown in the schematics for most of the Digilent boards.
  5. For readers not familiar with why C0G is better than X5R in this application, you can find a simple explanation here. (The links @MagicianT posted above go into much more detail.) In particular it explains (C0G have class 1 dielectrics. X5R have class 2 dielectrics)... "If you design audio devices, or if you simply prefer quiet PCBs, you have another reason to choose C0G over X7R or X5R: Class 2 caps exhibit piezoelectric behavior that can cause them to function as both microphones (that will convert sound into electrical noise) and buzzers (that will convert AC signals into audible noise). Class 1 capacitors don’t have this problem."
  6. Also, you should be able to use the Xilinx Licensing site to move a license.
  7. kwilber

    NEXSYS 4 DDR XADC DEMO

    You need to download the zip from the Releases page. I currently see packages for Vivado 2016.4 and 2018.2. The demo projects should be used with the specified version of vivado.
  8. kwilber

    TCS34725 Basys3 VHDL

    To make sure I was not misleading you, I just put together a project for the Arty using a PmodCOLOR using the technique I described. In addition to the PmodCOLOR block, AXI gpio block and microblaze block, I added an AXI Uart block so rgb values could be dumped to a terminal. You should be able to assemble the blocks on your basys 3. The procedure to build a microblaze based design in vivado can be found here. Follow the microblaze path. I used the PmodCOLOR demo app as a starting point and extended it to use the AXI gpio to set two leds. If you have the digilent IP library installed, you can find the demo app in <vivado-library-install-location>\ip\Pmods\PmodCOLOR_v1_0\drivers\PmodCOLOR_v1_0\examples\main.c The main loop of the app looks like this. Most of the code is provided in the demo. I added the lines dealing with the leds. There is more to accurately determining color given rgb values, but my simple use of thresholds should suffice for this simple project. void DemoRun() { u8 ID; u32 leds; COLOR_Data data; CalibrationData calib; xil_printf("Pmod COLOR Demo launched\r\n"); ID = COLOR_GetID(&myDevice); xil_printf("Device ID = %02x\r\n", ID); // Turn on sensor led to illuminate objects passed over the sensor COLOR_SetLED(&myDevice,1); data = COLOR_GetData(&myDevice); calib = DemoInitCalibrationData(data); usleep(2400); while (1) { data = COLOR_GetData(&myDevice); DemoCalibrate(data, &calib); data = DemoNormalizeToCalibration(data, calib); xil_printf("r=%04x g=%04x b=%04x\n\r", data.r, data.g, data.b); // Thresholds empirically chosen. // Led1 lights for red object // Led2 lights for green object leds = data.r > 0x8000 ? 0x01 : 0; leds |= data.g > 0x5000 ? 0x02 : 0; XGpio_DiscreteWrite(&myLeds, 1, leds); usleep(500000); } } Running the app and moving a red object over the sensor produced output similar to this: Pmod COLOR Demo launched Device ID = 44 r=0000 g=0000 b=0000 r=0000 g=0000 b=0000 r=0000 g=0000 b=0000 r=0000 g=0000 b=0000 r=0073 g=0026 b=0022 r=0073 g=0026 b=0022 r=0073 g=0026 b=0022 r=0073 g=0026 b=0022 r=384C g=0C3F b=0BFD r=A84E g=28B0 b=25A1 r=A6B1 g=27EE b=253F r=A69B g=27F4 b=2544 r=A69B g=27F4 b=2544 r=A69B g=27F4 b=2544 r=9020 g=2339 b=208C r=9020 g=2339 b=208C r=0004 g=0003 b=0002 r=0004 g=0003 b=0002
  9. kwilber

    TCS34725 Basys3 VHDL

    You can create a Vivado block design project and add a PmodCOLOR block, an AXI gpio block and a microblaze block. You can customize the PmodColor block to use pmod connector JA. Customize the gpio block to use the leds. You will need to supply an appropriate constraint file. The PmodCOLOR block will take care of implementing the i2c protocol and will allow an application created with the SDK to access the color sensor. You will need to wire your TCS34725 to the pmod according to the PmodCOLOR pinout. In a previous post you mentioned using a color sensor from adafruit. Be very careful to match the pin functions and not the pin numbers. For example, pin1 on the Basys 3 pmod is a data line. Pin 1 on the adafruit TCS34725 is vcc. After generating a bitfile from your design, you will need to export the hardware including the bitstream and then launch the SDK. The SDK will import the hardware automatically. You can then create an application that reads from the TCS34725, figures out what color light is being sensed and then turn on the appropriate LED. None of these steps are difficult, but you will need to be familiar with Vivado, the SDK and C to implement them.
  10. In the instructions for 4.2, it says only use the microblaze for boards without a zynq.
  11. kwilber

    Pmod DA3 clocking

    My project wrote to the dac about every 4 usec. To write 2 ^ 16 = 65536 values, it took about 262 msec per cycle, which gives a frequency close to 3.81 hz. I conservatively used ext_spi_clk = 25 Mhz so my sclk rate was 12.5 Mhz. In the zoomed trace, you can see 16 bits took about 1.28 usec to clock into the pmod. I had ~CS go valid about 1.25 usec before I started writing the bits and kept it valid for about 1.25 usec after the bits were clocked out. The rest of the time was from loop overhead. You appear to be writing almost 70 times faster. Your waveform is not as smooth as mine, so I would guess you are writing so fast the dac is missing some of your data points. Are you using the version of xspi.c from my example project?
  12. kwilber

    Pmod DA3 clocking

    Inside the AD5541A, the MOSI bits get clocked into a shift register and are held there until the ~CS line goes high. At that time, the bits are transferred from the shift register to the D/A. It does not matter what level is on MOSI at that instant. In the traces I posted earlier, I included a transition from full scale output to 0. I also show several cycles of writing all possible values in a ramp. The resulting voltage waveform shows the AD5541A is seeing the data correctly. The last four writes to the pmod in the zoomed trace show sending the values 0, 1, 2 and 3 to the D/A. You can observe SCLK's transition in relation to the least significant bits of the data. SCLK is not transitioning when ~CS transitions to high so the data on MOSI is "don't care" at that instant. I did use different clocks since the microblaze can run at higher clock rates than the AD5541A. Also, when you are troubleshooting, it can sometimes help to slow down the logic. I see you are using pmod connector JB whereas my project used JA. Just as a test, you might want to try moving your PmodDA3 to JA and use my project as is to replicate my results. You should be able to launch vivado, open my project then immediately launch the SDK from vivado. You should not have to generate a bitfile. I had included the hardware handoff in the zip file I gave you so you have my exact bitfile. Once the SDK loads, it should automatically load the project and compile it. At that point you can program the fpga from inside the SDK and then run my example app. You should see a sawtooth waveform coming out of the PmodDA3 if all is well.
  13. kwilber

    Pmod DA3 clocking

    I included visualizations of the ~CS, SCLK and DIN lines in the logic analyzer trace I posted Tuesday at 2:51 AM. In the trace, MOSI is the DIN line, Enable is the ~CS line and Clock is the SCLK line. Did the Xilinx SDK report any errors while opening the workspace? Did you program the fpga from the SDK?
  14. kwilber

    NEXYS 3 frequency meter

    The problem is likely in the .ucf file where you define pin information. The error message says device pin LL8 doesn't exist. If you post the contents of your ucf, we can probably figure it out.
  15. kwilber

    FMC Breakout

    I like the IAM electronics board better because you can stack another board on top, somewhat like a pcie card interposer. The Xilinx XM105 is ok but I had to use ribbon cables to get the signals to a prototyping board. That may not be a problem if you are routing lower speed signals thru the FMC, but it might affect the fidelity of higher speed signals.
  16. kwilber

    FMC Breakout

    Something like these? https://www.tindie.com/products/IAM_ELECTRONIC/fpga-mezzanine-card-fmc-breakout-board http://www.kayainstruments.com/fmc-prototype-board/
  17. kwilber

    CMOD a7-35t Schematic

    I found this page useful. About 1/3 the way down is a picture of the two boards side by side.
  18. Ah thats right, I had to correct that as well. Just change the instance name of the up/down counter to counter. Sorry I forgot about that. up_down_counter counter ( .clk(clk_div), .counter(counter1) );
  19. The simulation ran without issue for me. The error message indicates there were errors during the compile. Can you post the full output? After you took care of the "non-module files", did you use the "Refresh hierarchy" command (right click in the sources window and select "Refresh hierarchy"). Did you retarget the project for the Zedboard? (double click on the "Project part" link in the "Project Summary").
  20. You can delete the reference to DA2RefComp.vhd under non-module files (right click on the file and select "Remove file from project"). Then re-add the file to the project using the "Add sources" command. Simply copying the file to the directory from outside of vivado is not sufficient for vivado to know about the file.
  21. kwilber

    CMOD a7-35t Schematic

    The cmod resource page has the schematic here.
  22. kwilber

    Pmod DA3 clocking

    @Ahmed Alfadhel, I have sent you a PM with a link to the project archive. The forum limits the size of attachments so I am not able to upload it.
  23. kwilber

    Pmod DA3 clocking

    I forgot you were using an Arty. I will retarget my project to use an Arty A35 and will then post it.
  24. kwilber

    Pmod DA3 clocking

    I obtained a DA3 and was able to get it working. Here are some pictures of my setup. I am limited by how big the attachments are so I will post again with an archive of the project I used.
  25. Hello @mehmetdemirtas89, Yes, you can use the PmodDA2 with the zedboard. Note that there is no IP core in Digilent's vivado_library for the DA2. However, on the reference page for the DA2, you can find usage information. You can download the verilog example and the reference component. You will need to retarget the example project to use the zedboard instead of an Artix based board. You will also have to supply a constraints file for the project. Here is the physical setup I tested. (My zedboad's jtag usb connector broke off a while back so I have to use the Xilinx platform cable to program) Here is what the logic analyzer shows while it is running And zoomed so you can see the writes