farhanazneen

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  1. farhanazneen

    XADC and the FFT

    @D@n sir i wanted to know how xadc samples are captured and saved in .csv file from @mohamed shffat post is XADC samples captured in sdk or in vivado
  2. I want to implement the FFT spectrum of input square or sine wave project in zedboard below is the PDF attached from page 4 to page 16(audio processing part implemented in nexys4 board) which i wanted to implement in zedboard (not in nexys4 board) with sine or square wave input, now my question is how to interface Xadc with zedboard and send the samples to FFT please do let me know once refer that PDF and do let me know please. below is the link povided for coding part of audio processing part but i got stuck to interface xadc with zedboard and to send samples to the FFT. https://github.com/mitchgu/GuitarHeroFFE New Guitar Hero_ Fast Fourier Edition Final Project Report.pdf
  3. farhanazneen

    XADC simulation analog waveform / DRP interface

    @jacobfederxadc simulation issue never ends i was trying since past 3 weeks to simulate xadc with auxiliary input vaux0 (zedboard xadc header pin) sinewave but always stuck with the errors.Always there is warnings showing up top module is not defined and undeclared parameters.I want a testbech with drp interface of auxiliary input plz if u have do provide it
  4. farhanazneen

    XADC simulation analog waveform / DRP interface

    @jacobfeder sir my question is i simulated the xadc example project which is provided by xilinx with testbench but without the auxiliary or differential inputs but my question is now i want to simulate xadc ip with auxiliary inputs in vivado simulator i wrote test bench too but im getting errors . could u provide me test bench for auxiliary input to simulate in vivado simulator without using sdk. The below is the attachment of xadc example project of output without input i would like to implement same but with auxiliary input plz do let me know sir how to proceed.
  5. farhanazneen

    issue with design.txt file in xadc

    @jpeyron thanks for your reply sir my question is i simulated the xadc example project which is provided by xilinx without the auxiliary or differential inputs but my question is now i want to simulate xadc ip with auxiliary inputs in vivado simulator i wrote test bench too but im getting errors . could u provide me test bench for auxiliary input to simulate in vivado simulator without using sdk. The below is the attachment of xadc example project of output without input i would like to implement same but with auxiliary input plz do let me know sir how to proceed.
  6. farhanazneen

    issue with design.txt file in xadc

    @jpeyron sir hello xadc simulation issue never ends i was trying since past 3 weeks to simulate xadc with auxiliary input vaux0 (zedboard xadc header pin) sinewave but always stuck with the errors.Always there is warnings showing up top module is not defined and undeclared parameters.Below is the attachments of main module , test bench and instantiation of ip. Please do let me know where iam making mistakes or else please provide me a main module & testbench code with auxiliary input . please provide me a mainmodule and testbench code with auxiliary input zedboard. adc main.docx adc testbench.docx
  7. hello xadc simulation issue never ends i was trying since past 3 weeks to simulate xadc with auxiliary input vaux0 (zedboard xadc header pin) sinewave but always stuck with the errors.Always there is warnings showing up top module is not defined and undeclared parameters.Below is the attachments of main module , test bench and instantiation of ip. Please do let me know where iam making mistakes or else please provide me a main module & testbench code with auxiliary input . please provide me a mainmodule and testbench code with auxiliary input zedboard.
  8. farhanazneen

    XADC simulation analog waveform / DRP interface

    @jacobfeder sir the below is the attachment of mainmodule and testbench please do let me know why i couldnt ge the proper output xadc main.docx xadc testbench.docx
  9. farhanazneen

    issue with design.txt file in xadc

    sir @jpeyron this is my test bench and mainmodule please do let me know why i couldnt get the proper output and the below are the warnings in vivado xadc main.docx xadc testbench.docx
  10. farhanazneen

    issue with design.txt file in xadc

    Thanks for your reply sir @jpeyron now i changed the inputs of xadc header i gave input to Vp and Vn pins still design.txt is not readable please do let me know sir
  11. farhanazneen

    issue with design.txt file in xadc

    hello sir how to add design.txt please do let me know when i run the behavioural simulation im not getting any output and my input values representing xxx as my design.txt is not being read please do let me know how to add design.txt file in simulation. The below are the pictures of simulation & design.txt file. I just initialise the ip and after generation of output product i got 2 design.txt files i dont know why.Please do let me know how to add design.txt such tht i can get correct output.Below is the attachment of initialised ip .
  12. farhanazneen

    XADC simulation analog waveform / DRP interface

    @jacobfeder sir this is how i initialise the IP below is the attachment. Iam trying since more than one week i couldnt solve design.txt issue. plz do let me know how to solve it .
  13. farhanazneen

    XADC simulation analog waveform / DRP interface

    @jacobfeder i just initialise the ip and after generation of output product i got 2 design.txt files i dont know why
  14. farhanazneen

    XADC simulation analog waveform / DRP interface

    hello @jacobfeder how to add design.txt please do let me know sir when i run the behavioural simulation im not getting any output and my input values representing xxx as my design.txt is not being read please do let me know how to add design.txt file in simulation. The below are the pictures of simulation & design.txt file
  15. hello sir

    I want  to create a simple design that reads an  sine  waveform from the XADC. Can some explain how exactly to do this? I'm a bit confused about how the interface works. I've read through the XADC and XADC wizard documents from Xilinx. How to create a  design.txt file please do let me know.