farhanazneen

Members
  • Content Count

    43
  • Joined

  • Last visited

About farhanazneen

  • Rank
    Frequent Visitor

Recent Profile Visitors

The recent visitors block is disabled and is not being shown to other users.

  1. farhanazneen

    latency and throughput of fft processors

    @D@n sir pipelined technique is implemented in order to get the high throughput but at same time the latency also increases ( increases the execution time of each instruction due to overhead in the pipeline control) this is what the issue comes in pipelining technique that is pipeline latency. So here in pipelined FFT(xilinx fft ip) why there is less latency as pipelined techique always has high latencies compared to non pipelined techinque. If this is the case that pipelined fft processor has less latency how could i justify it? because i always have had learnt that pipeline has high latency due to overheads.Do let me know sir as i was asked this question many times .
  2. farhanazneen

    latency and throughput of fft processors

    As we all know that pipelined processors has more latency and less execution time compared to non pipelined processors then why the latency of pipelined fft processors is less compared to radix-2 fft and radix-4 fft as per the xilinx fft ip latency of pipelined fft processor according to xilinx fft ip: 8341 cycles latency of radix-2 fft as per xilinx fft ip: 33009 cycles latency of radix-4 fft as per the xilinx fft ip: 14483 cycles below has the attachments of latency of different processors according to xilinx ip https://www.xilinx.com/support/documentation/ip_documentation/xfft/v9_0/pg109-xfft.pdf page 41 to 43 has different block diagrams of fft processors.Do let me know please about latencies why pipelined fft processor has less latency and how to find throughput of it.
  3. farhanazneen

    zedboard audio processing

    hello how to give external input of recorded voice(be it like a songs or something else but should be recorded one) to zedboard to the xadc auxiliary pins for performing FFT on it do let me know.Previously my task was to give sine wave input to the xadc header through the frequency and signal generator and perform the FFT on it to generate the spectrum of sine wave below has the attachment of generating a sine wave spectrum on zedboard now instead of sine wave i should give some recorded voice as input to the xadc header .I could not find what could be an instrument and the type of cables and wires to give external input to xadc header to perform FFT on it do let me know please.
  4. farhanazneen

    working of pipelined FFT architecture

    @D@n sir thanks for your reply my aim of the project is i have to know the latency of radix-2 FFT with pipeline and without pipelined mode.As i know the latency of pipelined FFT is lesser than without pipelined FFT but how to calculate it theoritically .I have to compare the latency timings of both 4k point pipelined and nonpipelined FFT which iam unable to do.Do let me know sir how to calculate latency between both pipelined and non pipelined radix-2 FFT.
  5. farhanazneen

    working of pipelined FFT architecture

    @D@n thanks sir i would really appreciate your help now i would like to ask how to calulate delays for pipelined FFT, radix-4 FFT and radiX-2 FFT .The above delay calulation you have mentioned for pipelined FFT so what are the delays of raidx-4 and radix-2 FFT. Do let me know as iam very much confused in these differences.
  6. farhanazneen

    working of pipelined FFT architecture

    how pipelined FFT is working from the xilinx FFT pdf if input data is loading and unloading data in memory then how stage1 radix-2 FFT is fed to stage-2 radix-2 FFT and where latency is stored ?how it is working?Do let me know as it is not much briefly explained in xilinx FFT pdf. in page:42 block diagram of pipelined streaming i/o as there is not much description about it do let me kow the working of each blocks of it. https://www.xilinx.com/support/documentation/ip_documentation/xfft/v9_0/pg109-xfft.pdf
  7. farhanazneen

    fft spectrum analyzer on SOC

    @xc6lx45 i just wanted to know it how different is to implement spectrum on soc rather than other techniques and what are the advantages of it.
  8. farhanazneen

    fft spectrum analyzer on SOC

    How analysing of FFT spectrum in SOC is different from analysing other techniques like they are many methods of implementing FFT spectrum how beneficial is to implement spectrum in SOC?Do let me know.Advantages of implementing FFT spectrum on SOC .
  9. farhanazneen

    XADC and the FFT

    @xc6lx45 again iam getting the same error sir please do let me know where iam making mistake.Below has the attachment of xadc samples data and error pic i have to compute fft computation on the sampled data input. sin10khznew.csv
  10. I need a coding of FFT to perform the computation of sampled data input in SDK please do let me know the coding part in sdk for FFT.
  11. farhanazneen

    XADC and the FFT

    @D@n my project is bit similar to @mohamed shffat project i couldnt rectify the error in matlab could you help me where iam making mistake in MATLAB for .csv file sin10khz.csv
  12. farhanazneen

    XADC and the FFT

    @D@n sir when i try to run the @mohamed shffat sin10khz.csv file in MATLAB iam getting errors in first line how did u remove it and how that FFT function command(plot(10*log(fftshi´╗┐ft(abs(fft(X(4,:)))))/log(10))) has worked could you explain it . please do let me know sir why iam getting errors. I generated the frequency spectrum of sinewave(10khz) using zedboard through VGA module below is it attachmments and xadc sampled output in vivado simulator. Iam getting some distortions in frequency spectrum couldnt rectify it so wanted to try sin10khz.csv file of @mohamed shffat in MATLAB please do let me know where iam making mistake in MATLAB as i have a very less time for project submission below has the attachments of matlab errors. sin10khz.csv
  13. iam using zedboard xadc header auxiliary inputs vaux0 here what i did is i gave input of 500mv to vaux0p and grounded vaux0n pin i left unconnected vref and AGND my signals values in dashboard is continuously varying and iam getting wrong sampled output in simulator.So my question is where iam making mistake am i doing wrong connections by not connecting AGND to GND and grounding vauxn0 please do let me know.
  14. farhanazneen

    Zedboard Zynq 7000 XADC Header

    thanks @jpeyron i really appreciate your help one last question was how much mm female connector i required to xadc header do let me know
  15. farhanazneen

    Zedboard Zynq 7000 XADC Header

    @jpeyronsir only just let me know do i need AMS evaluation card for xadc header? as i dont have it what would be the alternate way to give external input.