Clyde

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Everything posted by Clyde

  1. Sorry, I will rephrase my question with much more detail and clarity, but for now, one thing that I don't understand is Petalinux seems to be grabbing Yocto files in the build that go with a later version of Vivado. That is, from 2019.2 when I am using 2017.4. Again, I will will spell out exactly what I am doing and where it falls apart. So much is right... it just dies at the very end of the build, so, I am very close and I have a whole lot correct.
  2. Clyde

    Pmod Connector

    Well, then, if you want a crimp terminal that goes into a housing, I would recommend Harwin for this kind of thing. I don't have a part number, but they make the receptacle that is a single, goes on the 0.025 post, with crimp terminals. This is the connector you see on JTAG programmers. My bet is that Harwin makes the compliment, with pins. Clyde
  3. Clyde

    Pmod Connector

    Go with the Sullins part above. If you want a board designed... let me know.
  4. I was wondering if he ever found replacement hardware for his application. I'd be interested in do a similar design if he wanted to entertain that, custom, the way he wants it. I did my own shield for the arty for audio in and out. Clyde
  5. Perhaps a schematic, part number or block diagram would help users help you.
  6. I wish I could at the very top level of the forum section have the option to search for posts by date, specifically most recent. I have received help from the forum and would like to give back... but so many posts are so old, they are not relevant most likely. Maybe this feature exists, but it is not obvious to me. Clyde
  7. I am re-designing an LED display module, similar to the PMOD SSD. It has 8 digits (I like LEDs) which are multiplexed. It requires two PMOD ports. I have used the prototype successfully on both the Arty A7 and the Zybo Z7. The current design blocks JA and JD on the Arty and JB and JE on the Zybo. The plan in the next revision is to have a bypass connection so that those ports are available for other use. It does not interfere with JA on the Zybo. I would provide a blank board, parts list (one part) and my Verilog HDL driver for it. Currently the design operates in a hexadecimal mode, or decimal. The code in decimal mode allows for leading zero suppression, or not. The decimal points may turned on in any desired pattern. I have yet to work out the logic for displaying a minus sign before a negative number, decimal mode. Is there any interest in me putting this up for sale? How about the analog interface module for the Zybo—two temperature sensor inputs and two 0-3.3 VDC inputs.
  8. Did you ever resolve this issue? Clyde
  9. To each his own. I have had to work with parameterized code (not mine) which is almost unusable and unreadable, and for me, readability is king. Properly done, I will agree with you. Clyde
  10. I have worn out my USB connector and will have to put in a cable, short, and overmold it hot melt glue, or go buy another one. My zybo has a power switch which saves the connector. A good quality micro USB connector should have at least 10,000 cycles. Clearly, the one on the Arty is the cheapest one they could find without regard to quality. Clyde
  11. In my experience the efforts to parameterize a design rarely pay off. A byte is going to be 8 bits for a long time. There is readability lost in the parameterization. I will stick with straight code with an emphasis on readability. Just my $0.0256 worth.
  12. Samtec makes one... Do you want a board design to go with it? Clyde
  13. I would be careful in making a substitution of the LM358. Although it is a very old part, it has some desirable performance characteristics that make it superior, especially at voltages near ground in a single supply application. Be careful of the product selector guide at Digikey when it comes to operational amplifiers. The supply voltage numbers in the selector guide do not always line up with the data sheet. HTH If you post the whole circuit with the op-amp, I might try and simulate it for you. A complete schematic please.
  14. All, I am building my linux image for the Zedboard and it all goes along swimmingly until the very end when it dies with the rootfs. The message I get is The postinstall intercept hook 'update_font_cache' failed. This is the only error in the whole process. One other concern I have, is in watching the build happen, I see what looks like files associated with Vivado 19.2 being used. My build was created with 17.4. However, none of these files being grabbed from the Yocto project throw any errors. Any hints here? BTW, I don't want to move up to 19.2 at this time. Clyde
  15. Clyde

    Pmod Connector

    If you are going to PCB, there is 0879110611 from Molex, and PRPC006DBAN-M71RC from Sullins. Be careful as there is an error on the Molex data sheet.... I will admit, I have not actually used the Molex part, but have it designed in. The 3D step model for it shows that it will fit the same as the Sullins part. It's 5.12 mm from the left edge of the black housing to the center of the two rows of pins.
  16. You are losing me in your problem description without a block diagram. I too want to know how to go from the PS to PL and I think the answer lies in UG585. My guess is it involves using the MIO not as a means to access peripherals, but just a general interface. It is curious that when configuring the ZYNQ, one can completely disable all of the peripherals. There are lots of things to learn. Clyde
  17. UG585 talks of a serial interface for JTAG... but this seems like a very difficult way to go. Writing HDL to access the XADC in parallel is well described in UG480. Configuring the block in the IP configurator makes the HDL to drive it very simple. The HDL example in UG480 is far more complicated than it needs to be, as the IP block can be completely configured in the IP configurator. I had a simple example of the parallel mode, but I broke it. Perhaps I will dust it off and fix it. Clyde
  18. Yes, it is a Zynq platform... I do assume you have the AXI-lite bus hooked up ;<} I wired stuff up thinking I needed to before I saw the code examples. I have some reading to do for sure. Thanks again. Clyde
  19. Somehow my first reply to the above got lost. I see it now, and thank you. I dismissed the mss page examples because my simple attempt of reading the buttons and driving the LEDs was thwarted because the example code did not show how to read the buttons. I am beyond that now. Could you please post how you hooked up the XADC? have CONVST coming out of a GPIO port and EOC going in, which seems reasonable to me. Clyde
  20. All of the system.mss files I have on my system are 5k bytes or smaller, so I don't quite get what to do with them. I don't have any project that has anything like your "ps7_xacd_0 xacd_ps xadcps_polleded_printf_example.c" in it, so I am lost finding anything similar. What I mean by kicking it up a notch is is to do some real world measurements, scale format the numbers and print them with printf. All I have right how is a 7 segment display and one channel at a time. Perhaps you could kindly point me a little closer? Clyde
  21. Hi, I did not find much of anything with system.mss. I am well familiar with using the DRP and HDL to access the XADC, now I am just trying to kick it up a notch an do it in C. Perhaps there is something I have missed. Clyde
  22. Is there an example of simple bare metal code for accessing the XADC? This poster did it, but it wasn't what he really wanted: https://forum.digilentinc.com/topic/12613-program-code-on-petalinux/ Clyde
  23. Clyde

    Digilent Github Demo

    That was it! I am on my way now and thank you. One quick question about the SDK, sometimes I loose the project explorer window where I may see the source files and I can't figure out how to get it back. I have poked around in the menus, but nothing seems to help. Clyde
  24. Clyde

    Digilent Github Demo

    The box it came in says Zybo Z7. Project part in Vivado says Arty Z-7. I do not have JB. Looks like a smoking gun here. Perhaps I picked the wrong board. Lemme look. Clyde
  25. Clyde

    Digilent Github Demo

    Yes, you are correct. It is the ARTY Z7-10 board. No JB. HDMI port. Attached is the block diagram and a screen shot from the output of the implementation showing that the pins are incorrect. I created the exact same project on my ARTY A7-35T with a Microblaze processor. Identical source code. In the A7, the design works. Buttons pressed light up the LEDs and the report to the terminal shows the digital value of the key press(es). With the Zynq, all I get are the terminal messages. Clyde forum_2020-04-22.pdf