• Content Count

  • Joined

  • Last visited

About Sergiu

  • Rank
    Frequent Visitor

Profile Information

  • Gender

Recent Profile Visitors

3412 profile views
  1. Sergiu

    Adept DPTI support

    hello, have you looked at the projects from this location? Sergiu
  2. Hello @cgarry, Could you tee us what state is the "lock" signal is ? Is it also tied to an LED ? Have you looked at the examples from our reference page ? Sergiu
  3. Hello, Using Vivado 17.4 I got the example to work with either 100 or 1000 mbps. I see a DHCP timeout in your post Please go to SDK in main.c and search for "dhcp_timoutcntr". You will find this variable set to 24. Please change it to 50 or 100 and try again. In some cases the counter expires before obtaining an IP and DHCP fails. You should also look in the MSS file (open with text editor) and search for " PARAMETER LIBRARY_NAME = lwip141". That is where the lwip settings are stored for the project. It should look like this: BEGIN LIBRARY PARAMETER LIBRARY_NAM
  4. Hi You can use the AXI PS/2 IP core that you can find here. There is also a demo project for it here (made for the Nexys Video). The demo basically writes to a terminal opened on the PC whatever you type on the keyboard connected to the board's USB HID port. I am working on the wiki page for the demo project but for now you can use the IP's documentation to understand how it works. Sergiu
  5. Hello, Could you please provide more details regarding the problem? Also, please take a look at the following forum thread and see if it helps: Sergiu
  6. Hi, One way to start would be to take a look at the examples provided by Xilinx. You can find them at this location: C:\Xilinx\SDK\2016.4\data\embeddedsw\XilinxProcessorIPLib\drivers\uartps_v3_3\examples Or you can look at the "system.mss" file in SDK (bsp folder) and click on "import example". -Sergiu
  7. I am not sure that I understand, are you trying to power an arduino board from an FPGA pin like JC1 (K17) ?
  8. Sergiu

    XADC examples

    Hi. Have you seen this forum thread?
  9. Sergiu

    UART interrupt example

    The PS UART does have interrupt capabilities. Have you seen the UART interrupt example provided by Xilinx? I believe it will answer your questions. You can also find the controller's specifications in the Zynq reference manual page 583. Sergiu
  10. Well I'm glad to see that you got it going. Indeed that workaround should be included somewhere. Have a good day, Sergiu
  11. Well, err.h is part of the lwip library. I don't know how it can go missing. Have you tried regenerating the bsp? Is lwip correctly included in the bsp? I just ran the echo example on a zybo (2017.1) and I had no issues other than the CONFIG_LINKSPEED1000 parameter. I can send you the project if you want and you can compare it with yours. Sergiu
  12. Hi, I believe the problem is caused by the fact that the ethernet phy found on the Zybo might not be compatible with Xilinx's lwip. Therefore I believe the solution would be to set the speed manually (right now its on autodetect which I think is the part that fails). In order to set it manually please enter the following command in the XSCT console: configbsp -bsp <bsp_name> phy_link_speed CONFIG_LINKSPEED1000 --to set the speed configbsp -bsp <bsp_name> -lib lwip141 --to check if it's set regenbsp -bsp <bsp_name> --regenerate the bsp Sergiu
  13. Could you also specify the version of Vivado / SDK that you are using? Please go to the XSCT console and type in the following command and tell me what it says: configbsp -bsp <bsp_name> -lib lwip141 Sergiu
  14. Hello, The first thing I noticed is that you are not using the TKEEP bus which I believe is necessary for the DMA. Other than that, I noticed that you have not checked the "Allow unaligned transfers" option and because of that you will be restricted to 4 byte transfers (in case you are asking for different lengths). I recommend looking into these first since it is possible that this is causing the problems. Also I do not understand what you mean by 0.2 Mhz. Is that some clock frequency or did you want to say 0.2 ms/us/ns ? I would also recommend that you look at this
  15. Sergiu

    Connect my IP module

    Hello, Looking at the schematic I believe your design should work. The problem could be the C code that you use to drive the AXI GPIO. Have you looked at the examples provided by Xilinx ? I would also recommend that you use the Logic Analyzer too look at the signals or you could connect the AXI GPIO directly to the LEDs and see if the value changes. Sergiu