I am running from external power supply.
I have noticed that if Xilinx Vivado built in power report estimates 2.8A on the 1V supply line it will not work, while 2.7A and lower seems to work fine.
I am running the FPGA fabric as accelerators for the code running on the ARM cores. I am not doing any IO from the FPGA fabric (besides the AXI bus to the ARM cores). Currently I am running the fast clock in the FPGA fabric at 220MHz , going over that and the PMU cuts off. But I am amble to meet timing at 350Mhz for the fast clock in the design (fabric related to AXI busses are at 25MHz to not interfeer with the layout of the fast timed areas).
Just a heads up, I am a complete noob when it comes to designing/using/testing on FPGAs. I do have have over a decade of ASIC experience, but this was a lot more different then I expected it to be.
I have gone over the layout boards, my thinking was if there was an exposed 1V connector somewhere that could be abused. My thinking was that I'm probobly better of getting a ZedBoard Zynq-7000 for further testing, but it seems to have even worse power constraints on the 1V line (even tough it seems to have a heat-sink)? Or am I'm missing something?