Jim H

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  1. Jim H

    2 wire JTAG

    The closest match to the ARM SWD protocol is the JScan0-JScan3 in 2-Wire STAR topology mode, as referred to in the DJTG Programmer's Reference Manual (Doc 506-019), on page 16 and 17. The 2-Wire Star Topology diagram shows the TMSC pin as an output AND input.... but I see no API that allows the TMS stream to be captured and read... Can anyone comment on this? Thanks.
  2. Jim H

    2 wire JTAG

    Yes, I have seen the Two Wire Demo... but for our application the device is not in a standard 2-wire mode (OScan, for example). We are accessing the ARM core in SWD (single wire debug) mode, using just TCK and TMS. The protocol is similar to a serial SPI transaction. For example, a read requires TMS to drive out 8 bits of opcode, then 1 bit TAR, then 3 bits of returned ACK, followed by a 32-bit read. I can use DjtgPutTmsBits to drive the first 8 bits, but I have no way of reading the state of TMS for the remaining bits... Using DjtgGetTmsTdiTdoTck will return the current state of the pins, including TMS, but I need a way to send clocks and read TMS... I have thought of using the Dspi functions, but they TMS as the CS so that is not a solution.
  3. Jim H

    2 wire JTAG

    I am using the Digilent HS-2 cable to communicate with an ARM core in 2W mode (ARM's SWD - single wire debug mode). The signals available are CLK and TMS. Sending doesn't look to be a problem, but when I read data from the ARM, it is sent out on TMS. How do I read the state of the TMS pin? The Diglent DLL has an API"DjtgPutTmsBits", but nothing to get the state of TMS. Any ideas?
  4. Thanks for your quick reply. In our current implementation with the "original JTAG USB" cable and dpcutils, we do use a semaphore to allow multiple applications to use the Digilent. But that involves the calls to jtag enable and jtag disable around the access. You mentioned a server/client setup but I don't see a way to keep the port enabled and allow different apps to access it - each application must call jtag enable and jtag disable otherwise it crashes... We are testing the HS2 because we need 2-wire JTAG.. is there another solution that gives us 2-wire capability without the slow enable/disable? Thanks
  5. I am using the Digilent HS2 cable on a Windows10 machine, using dmgr.dll and djtg.dll. I am able to call DmgrOpen and DjtgEnable to initialize my JTAG. I can then perform reads and writes to my FPGA without issues. But since we have multiple programs accessing the same JTAG port, I need to call DjtgEnable before each read, and DjtgDisable after each read. This works fine except it takes a long time to complete the enable and disable calls (rough measurements show 63 msec for the enable, and 140 msec for the disable). Switching to the old Digilent cable and drivers (dpcutils.dll) shows a much faster completion rate. Any ideas?