Newport_j

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  1. Newport_j

    Problem on Vivado starup on Ubuntu

    I will try what you said. I have seen this document before. the only thing that scared (and it really scared me) are the two lines: sudo chmod 777 -R /opt/Xilinx/ Sudo chmod 777 -R ~/.Xilinx? When ever I see the -R option marker it really causes me to pause. If one is not careful then that -R can make changes to all of the files and destroy your install. I just need to know what these two lines mean and how to use them safely. Any help appreciated. Thanks in advance. Respectfully, Newport_j
  2. Newport_j

    Problem on Vivado starup on Ubuntu

    Okay, answer this for me. Do I have to be root run Vivado or Vivado_HLS in Ubuntu Linux? I just need to know this. Any help appreciated. Thanks in advance. Respectfully, Newport_j
  3. Newport_j

    Problem on Vivado starup on Ubuntu

    Okay, I became root and experienced no problems on startup. is this a good idea though. As I said, I do not like to be root unless i absolutely have to be root. Any help appreciated. Thanks in advance. Respectfully, Newport_j
  4. Newport_j

    Problem on Vivado starup on Ubuntu

    I do not believe that I am. That seems rather dangerous. I want to be root when I am installing software or making major system changes. I can start Vivado as root, I just would like to be not root while using Vivado. Any help appreciated. Thanks in advance. Respectfully, Newport_j
  5. Newport_j

    Problem on Vivado starup on Ubuntu

    In the attached document, I have an error. I worked through eh VIvado HLS tutorial on Windows completely except for the final two chapters. I am now trying to work through the tutorial again on Ubuntu. After sourcing setting.sh. I type Vivado. it comes up slowly, but also issues two warning about write permissions in a Ubuntu directory. The attached sheet has a text of the warnings. I am a little rusty on this so what changes should I make to avoid these warnings showing up again. As I said the warnings are only on the Ubuntu tutorial. Any help appreciated. Thanks in advance. Respectfully, Newport_j CRITICAL WARNING.zip
  6. Newport_j

    The Complete HLS Procedure

    This reply was helpful. Thank you very much. Respectfully, Newport_j
  7. Newport_j

    The Complete HLS Procedure

    I am confused about something. I have done the Xilinx High Level Synthesis tutorial (UG871, Dec. 2017) version. I have not done the last two chapters. But something is not clear. Let me give an example: I have some very large c programs that I would like to increase their speed of execution. They were programed properly in that the whole program is made up of subprograms that are, of course, much smaller. The programs are written in c and they compile and run as they should. However, when I profile the program, it is clear that the majority of the program execution time is spent in only a few subprograms. These programs make up about 98% of the program's execution time. So out of say 80 subprograms in my program only about eight are appropriate or suitable for high level synthesis. In other words the majority of the code is untouched and certainly not synthesized to Vierilog or VHDL. I should say that for a long time, I have been programming for GPU and it is almost always the case that only parts of big program are appropriate for modification. The majority of the code in GPU program to speed up execution is untouched. It is just c code. I am seeing the same when I started in high level synthesis programming. However, there sees to be a disconnect here. In GPU programming we are always worrying about the bandwidth of the CPU-GPU bus. How much data can pass between the CPU and the GPU and how fast will it pass. I see nothing like this is high level synthesis. I am not even sure how the FPGA I interfaced with the computer. I am guessing using a USB cable or a PCI Express connection, but I am really not sure. That is the reason for this post. In going through the Xilinx HLS tutorial it never discusses this aspect of the process - interfacing with the main program. I assume that it is there; I just have not seen it. For instance, how does one integrate a translated c code subprogram into the rest of the program? It just seems to be very silent on this matter. I said above that I have not performed the last two chapters of the HLS Tutorial in UG871. I think these last two chapters of the tutorial may be in the area that I am seeking. I am interested in your thoughts, since I really want to speed up a large complex program if for no other reason that to justify this expense to my sponsors. I have done a lot of high level synthesis this year, but I am seeking some practical answers to these questions. Sorry about the long winded post, but I just want to use HLS to speed up programs that are already running; they just are not running fast enough. Any help appreciated. Thanks in advance. Respectfully, Newport_j
  8. Newport_j

    Installing Xilinx Webpack for Windows 10

    Yes, that worked fine. Thanks you very much. Respectfully, Newport_j
  9. I had to completely remove my install of Xilinx Webpack for Windows. I want to reinstall it. i have forgotten how to. I need to know the procedure so I can re-install the Webpack again. I know that one must first download some executive app that continues the install for you. I guess that i need the name of this application and a link to download it. Then I can reinstall the Xilinx Webpack for Windows. Any help appreciated. Thanks in advance. Respectfully, James M. Yunker
  10. Newport_j

    Error When Following HLS UG871 2017.4 (December 20, 2017)

    I have got it now. Thanks you very much. The link that you gave me with the HLS tutorial. It is fine, but incomplete. is there more to it? The tutorial has several chapters and that was only the first. Do you have any succeeding chapters? Any help appreciated. Thanks in advance. Respectfully, Newport_j
  11. Newport_j

    Error When Following HLS UG871 2017.4 (December 20, 2017)

    Honestly, I thought that I did. I am confused, because I was following the tutorial for Vivado. 17.4.I used the Vivado HLS tutorial for HLS UG871 (December 2017 edition). I will have to do some checking. Thanks so much for your help. Respectfully, Newport_j
  12. On page 20 of the Vivado Design Suite Tutorial High Level Synthesis UG871 v2017,4) December 20, 2017 it says at the top of page 20 Click the Run C Simulation button or use... Now when i do that I get the following error as shown in the attached graphic: I am not sure what t hey mean and I did follow the instructions carefully. What am i missing or I am doing wrong? Any help appreciated. Thanks in advance. Respectfully, Newport_j
  13. Newport_j

    Vivado Design Suite High Level Synthesis

    On page 15 of the Vivado Design Suite High High Level Synthesis docu ment ug871 (17.4) it says 8. Click the part of the button to open the part selection window. 9. Select device xc7k160tfbg484-2 from the list of available devices. Select the following from the drop down .... Now here we select a part not a board. So my question is since I have the Zybo-Z7-20 board what part do I select? I know it must be some selection here. I know when I did the Digilentinc "Getting Started with Vivado" that we had to load a board file, but not a part files. So knowing that I have a Zyb0-Z7-20 board what do I do in this step? Any help appreciated. Thanks in advance. Respectfully, Newport_j
  14. Newport_j

    Editing the XDC file

    In page 11 of the "Getting Started with Vivado". It asks a few questions a The area that begins: I your board uses differential clocking.... Is where the questions are. and the answer depends on how the board is programmed. I need to know these answers for the these answers for the Zybo-Z7-20 board. Please tell me what they are. I do not know them. Thanks in advance. Respectfully, Newport_j
  15. Newport_j

    Editing the XDC file

    Okay, sorry about all of the stupid questions. It was just not clear to me. In addition to the un-commenting the three lines, I will add the changes in the lines that Jon put in his post. Thank you very much. Respectfully, Newport_j