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  1. Vivado 2015.4 gives the following error when trying to synthesize the GPIO_35t project: [Runs 36-256] This checkpoint was created with a newer version of vivado and cannot be opened in this version. I've downloaded the Cmod A7 35T directory from Github and followed the directions on page: The stated requirements are: Vivado Design Suite 2015.X Newer/older versions can be used, but the procedure may vary slightly I am using Vivado 2015.4. How do I overcome this error and proceed with the demo? Cheers, David
  2. Hi, I downloaded the ZYBO PCB schematic file ZYBO_sch_B_V2.pdf from the link This document is incomplete. For example, try finding IC17 or J11. Where can I find the complete schematic for my eval board (Rev ? Cheers, David
  3. Hi, I see in the ZYBO_zynq_def.xml file the following: <Projinfo Part="xc7z010clg400-2" DeviceSize="xc7z010" Package="clg400" Speed="-2" /> However, on my ZYBO board I see the chip in the attached JPG file. (I attached the photo of the chip, because I had problems sharing a link. It says I can't use JPGs, is that right?) I think I have a speed grade 1 chip, but the ZYBO_zynq_def.xml file indicates speed grade 2. This appears to be a mis-match. Is the file correct? What am I missing here. Does this file run OK on my ZYBO revB board? Thanks for your patience! Cheers, David