blueshark

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  1. blueshark

    DDR3 Usage

    Hello there, for six month I am learning VHDL, FPGA and related with an Artix-7 FPGA Development Board [1]. Now I am trying to access the onboard DDR3 memory for reading and writing. For convenience I try to avoid writing my onw DDR3 Interface, so I was looking at several IP cores. My plan was configuring a suitable IP core and create an HDL Wrapper, so that I can access it from my VHDL code. I tried the Memory Interface Generator, but on the other end it has an AXI Slave Interface. So it seems that one interface I have to implement by myself. Is there any simple solution or way, how