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TommyK

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  1. TommyK

    Eclypse-Z7 FPGA Fan

    @zygot, I pushed the fixes an hour ago. The fixed code was tested on hardware and works. The initial commit was somewhat rushed to get you something to work with as soon as possible. I apologize for the inconvenience it may have caused.
  2. Hi Emre, The PmodGPS library is kind of in shambles right now, but I'm working on fixing it up in the next week. As for I2C on the Arty, make sure you are setting the "I2C Pullups" board component high.
  3. Hi Emre, I just uploaded a new version of the IPs that don't have input frequency parameters, so they should work with whatever input frequency you give them. I think the ext_spi_clk still needs an input frequency of <50MHz to work though. You can create new clocks by double clicking the MIG IP block. Click "Next" until you see "Select additional clocks". Check the box and choose the clocks that you need. Then click Next Next Next Next,Validate, OK, Next, Next Next Accept, Next, Finish. It's a bit of a pain, but that's the MIG. Hope this helps!
  4. Hey Steve, Sorry it's been a while, I'm taking a vacation right now and won't be back in til next week. It's a bit unsettling that you're getting timing violations as this might be why your micro blaze design isn't working, but who knows at this point. The weird clocks are for the DDR memory actually. The part that's on the arty needs a 166.67 MHz clock with a 200 MHz reference clock. Have you tried completing the getting started with micro blaze tutorials on our Wiki? They might help with getting familiar with the work flow. I will be putting together a tutorial for the new Pmod interfaces when we release then, but it's still pretty early.
  5. Alright, the updated board files and library files are up on Github. I have attached a project for Arty that uses the PmodOLEDrgb and the new Pmod interface. It must be generated in Vivado 2015.4. To generate it, first unzip it, then open Vivado 2015.4. In the tcl console, type "cd <path to the PmodOLEDrgb/proj folder>". Then type "source ./create_project.tcl". Hope this helps! PmodOLEDrgb.zip
  6. Hey guys, I'm sorry it's been a while. I do have a working microblaze project right now. It uses a new pmod interface that I've been working on. It's still in the works, but I'll upload it and update the board files on the Github to add support. I'll let you all know when it is uploaded, probably an hour or so
  7. Hi Steve, I actually didn't know that project existed, but there are a couple others who are having the same problem. That project was made by Avnet. I checked it out and found that they manually constrained the sck pin on the QSPI bus. This can be fixed by removing the qspi_flash_sck from both the constraints file ("design_1.xdc") and from the block design. I'm pretty sure this was a bug with the old board files, so redownload the newly uploaded boardfiles before you try this fix. You can find the latest boardfiles here.
  8. Hello Steve, I'm working on a PmodOLEDRGB project for microblaze right now. I will let you know when it is complete. In the mean time you might try checking out the PmodOLED example code on the Wiki. I haven't looked into it, but I think they should work somewhat similarly.
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